Sort by
Compositional AI-Service Pipeline to Generate Interactive Structured-Data from Scanned Images
Anthony Savidis
,Yannis Valsamakis
,Theodoros Chalkidis
,Stephanos Soultatos
Posted: 19 January 2026
PACT: A Reference Viewpoint Taxonomy for Software-Intensive Systems
Huiwen Han
Posted: 09 January 2026
A Modular and Scalable Architecture for Reproducible Multi-Objective Optimization Experiments in Wireless Sensor Networks
Junio Cesar Ferreira
,Júlio C. Estrella
,Alexandre C. B. Delbem
,Cláudio F. M. Toledo
Posted: 09 January 2026
A Systematic Method for Evaluating the Generalizability of Mobile-Specific Research: Green Computing as a Case Study
Robin Nunkesser
Posted: 06 January 2026
Sem4EDA: A Knowledge-Graph and Rule-Based Framework for Automated Fault Detection and Energy Optimization in EDA–IoT Systems
Michael Dosis
,Antonios Pliatsios
Posted: 31 December 2025
Aquaculture Automation: A Sensor-Based Approach to Optimize Water Quality
Rehnumah Taslim Munmun
Posted: 26 December 2025
Zero-Knowledge Proof Extensions for Digital Product Passports in Sustainability Claims Reporting and Verifications
Chibuzor Udokwu
Posted: 18 December 2025
Hybrid Web Architecture with AI and Mobile Notifications to Optimize Incident Management in the Public Sector
Luis Alberto Pfuño Alccahuamani
,Anthony Meza Bautista
,Hesmeralda Rojas
This study addresses the persistent inefficiencies in incident management within regional public institutions, where dispersed offices and limited digital infrastructure constrain timely technical support. The research aims to evaluate whether a hybrid web architecture integrating AI-assisted interaction and mobile notifications can significantly improve efficiency in this context. The system was designed using a Laravel 10 MVC backend, a responsive Bootstrap 5 interface, and a relational MariaDB/MySQL model optimized with migrations and composite indexes, and incorporated two low-cost integrations: a stateless AI chatbot through the OpenRouter API and asynchronous mobile notifications using the Telegram Bot API managed via Laravel Queues and webhooks. Developed through four Scrum sprints and deployed on an institutional XAMPP environment, the solution was evaluated from January to April 2025 with 100 participants using operational metrics and the QWU usability instrument. Results show a reduction in incident resolution time from 120 to 31 minutes (74.17%), an 85.48% chatbot interaction success rate, a 94.12% notification open rate, and a 99.34% incident resolution rate, alongside an 88% usability score. These findings indicate that a modular, low-cost, and scalable architecture can effectively strengthen digital transformation efforts in the public sector, especially in regions with resource and connectivity constraints.
This study addresses the persistent inefficiencies in incident management within regional public institutions, where dispersed offices and limited digital infrastructure constrain timely technical support. The research aims to evaluate whether a hybrid web architecture integrating AI-assisted interaction and mobile notifications can significantly improve efficiency in this context. The system was designed using a Laravel 10 MVC backend, a responsive Bootstrap 5 interface, and a relational MariaDB/MySQL model optimized with migrations and composite indexes, and incorporated two low-cost integrations: a stateless AI chatbot through the OpenRouter API and asynchronous mobile notifications using the Telegram Bot API managed via Laravel Queues and webhooks. Developed through four Scrum sprints and deployed on an institutional XAMPP environment, the solution was evaluated from January to April 2025 with 100 participants using operational metrics and the QWU usability instrument. Results show a reduction in incident resolution time from 120 to 31 minutes (74.17%), an 85.48% chatbot interaction success rate, a 94.12% notification open rate, and a 99.34% incident resolution rate, alongside an 88% usability score. These findings indicate that a modular, low-cost, and scalable architecture can effectively strengthen digital transformation efforts in the public sector, especially in regions with resource and connectivity constraints.
Posted: 11 December 2025
Mitigating Data Sparsity and Privacy Risks in Educational Recommender System through Federated Learning
Oras Baker
,Ricky Lim
,Kasthuri Subaramaniam
,Sellappan Palaniappan
Posted: 09 December 2025
Empirical Evidence of AI-Enabled Accessibility in Digital Gastronomy: Development and Evaluation of the Receitas +Power Platform
Paulo Serrra
,Ângela Oliveira
,Filipe Fidalgo
,Bruno Serra
,Tiago Infante
,Luís Baião
Posted: 09 December 2025
Agentic AI: A Review, Applications, and Open Research Challenges
Omer Khalid
,Ammad Ul Haq Farooqi
,Muhammad Bilal
Posted: 08 December 2025
Formally and Empirically Verified Methodologies for Scalable Hierarchical Full-Stack Systems
Dong Liu
Posted: 07 December 2025
Serverless Architecture and Its Current State of the Art: A Systematic Literature Review
Ammad Ul Haq Farooqi
,Omer Khalid
,Muhammad Bilal
Posted: 04 December 2025
Production Development with Microservices Architecture and DevOps Practices
David Ostapchenko
Posted: 01 December 2025
Garbage Collection in Node.js: How Memory Management Affects Application Performance
Parvani Vafa Mokhammad
Posted: 01 December 2025
An Empirical Comparison of Microservice and Monolithic Architectures in Software Development
Saikal Batyrbekova
Posted: 17 November 2025
Large Language Model for Verilog Code Generation: Literature Review and the Road Ahead
Guang Yang
,Wei Zheng
,Xiang Chen
,Dong Liang
,Peng Hu
,Yukui Yang
,Shaohua Peng
,Zhenghan Li
,Jiahui Feng
,Xiao Wei
+7 authors
Code generation has emerged as a critical research area at the intersection of Software Engineering (SE) and Artificial Intelligence (AI), attracting significant attention from both academia and industry. Within this broader landscape, Verilog, as a representative hardware description language (HDL), plays a fundamental role in digital circuit design and verification, making its automated generation particularly significant for Electronic Design Automation (EDA). Consequently, recent research has increasingly focused on applying Large Language Models (LLMs) to Verilog code generation, particularly at the Register Transfer Level (RTL), exploring how these AI-driven techniques can be effectively integrated into hardware design workflows. Despite substantial research efforts have been invested to explore LLM applications in this domain, a comprehensive survey synthesizing these developments remains absent from the literature. This review fill addresses this gap by providing a systematic literature review of LLM-based methods for Verilog code generation, examining their effectiveness, limitations, and potential for advancing automated hardware design. The review encompasses research work from conferences and journals in the fields of SE, AI, and EDA, encompassing 70 published papers, along with 32 high-quality preprint papers, bringing the total to 102 papers. By answering four key research questions, we aim to (1) identify the LLMs used for Verilog generation, (2) examine the datasets and metrics employed in evaluation, (3) categorize the techniques proposed for Verilog generation, and (4) analyze LLM alignment approaches for Verilog generation. Based on our findings, we have identified a series of limitations of existing studies. Finally, we have outlined a roadmap highlighting potential opportunities for future research endeavors in LLM-assisted hardware design.
Code generation has emerged as a critical research area at the intersection of Software Engineering (SE) and Artificial Intelligence (AI), attracting significant attention from both academia and industry. Within this broader landscape, Verilog, as a representative hardware description language (HDL), plays a fundamental role in digital circuit design and verification, making its automated generation particularly significant for Electronic Design Automation (EDA). Consequently, recent research has increasingly focused on applying Large Language Models (LLMs) to Verilog code generation, particularly at the Register Transfer Level (RTL), exploring how these AI-driven techniques can be effectively integrated into hardware design workflows. Despite substantial research efforts have been invested to explore LLM applications in this domain, a comprehensive survey synthesizing these developments remains absent from the literature. This review fill addresses this gap by providing a systematic literature review of LLM-based methods for Verilog code generation, examining their effectiveness, limitations, and potential for advancing automated hardware design. The review encompasses research work from conferences and journals in the fields of SE, AI, and EDA, encompassing 70 published papers, along with 32 high-quality preprint papers, bringing the total to 102 papers. By answering four key research questions, we aim to (1) identify the LLMs used for Verilog generation, (2) examine the datasets and metrics employed in evaluation, (3) categorize the techniques proposed for Verilog generation, and (4) analyze LLM alignment approaches for Verilog generation. Based on our findings, we have identified a series of limitations of existing studies. Finally, we have outlined a roadmap highlighting potential opportunities for future research endeavors in LLM-assisted hardware design.
Posted: 13 November 2025
An Imperative Term Graph Programming Language
David A. Plaisted
Posted: 05 November 2025
Validating a First Educational Training System to Teach ScratchJr to Neurotypical and Neurodivergent Children According to Their Preferences and Needs
María Jesús Manzanares
,Diana Pérez-Marín
,Celeste Pizarro
Posted: 05 November 2025
rUnit—A Framework for Test Analysis of C Programs
Peter Backeman
Posted: 29 October 2025
of 12