Submitted:
05 April 2024
Posted:
05 April 2024
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Abstract
Keywords:
1. Introduction
- A decentralized robust control design methodology based on the LQR technique is described and applied to a multivariable dual-output DC-DC converter.
- A decentralized robust control design method based on the decoupled PID technique is described and applied to a multivariable dual-output DC-DC converter.
- The proposed methods are compared with one classical approach [31] to decentralized control. To this end, extensive experimental tests demonstrate the effects of different controllers, showing that the proposed LQR technique has better performance indices than other methods when the system is subjected to parametric variations (input DC voltage and resistance loads) and when a CPL is connected in each output once a time. Performance indices (ISE and ISU) are calculated to analyze the performance of the control method.
- For this purpose, a pilot plant (single inductor dual output DC-DC converter) was designed to implement the controllers and perform various tests to collect experimental data. The device allows the variation of physical parameters of the converter (input DC voltage and load resistances) and uses a programmable electronic load to emulate the behavior of the CPL.
2. System Description and Problem Formulation
2.1. Mathematical Model for a SIMO Converter
3. Proposals of Robust Controller Strategies for the SIMO Power Converter
3.1. Pairing Analysis for the SIMO Converter
3.2. Linear Quadratic Regulator Design
3.3. Decoupled Multiloop PI Controller
4. Experimental Methodology and Tests
4.1. Description of the SIMO Converter System Test Board
4.2. Description of Experiments
5. Experimental Results and Discussion
5.1. Input Voltage Variation
5.2. Load Variation
5.3. CPL Power Variation
6. Conclusions
Author Contributions
Funding
Conflicts of Interest
References
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| Parameter | Unit | Nom. Value | Variation | Description |
|---|---|---|---|---|
| Vin | V | 7 | [6-7] | Source input voltage |
| R1 | Ω | 10 | [5-10] | Loading at output 1 |
| R2 | Ω | 10 | [5-10] | Loading at output 2 |
| CPL1 | W | 0.5 | [0.6-0.5] | Output power of CPL1 |
| CPL2 | W | 0.25 | [0.35-0.25] | Output power of CPL2 |
| C1 | µF | 2200 | - | Capacitor at output 1 |
| C2 | µF | 1000 | - | Capacitor at output 2 |
| L | µH | 330 | - | Inductor |
| D10 | % | 40 | - | Operational point for duty cycle of output 1 |
| D20 | % | 60 | - | Operational point for duty cycle of output 2 |
| V10 | V | 3.11 | - | Operational point for output voltage 1 |
| V20 | V | 1.74 | - | Operational point for output voltage 2 |
| I10 | A | 0.311 | - | Operational point for current of the output 1 |
| I20 | A | 0.174 | - | Operational point for current of the output 2 |
| fsw | kHz | 7.8 | - | Switching frequency |
| fs | kHz | 2.0 | - | Sampling frequency |





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