Geometric Limits of Surface Loss in Transmon Wiring: Analytical Framework and Design Rules

Dielectric surface loss from junction wiring represents a critical secondary limit for superconducting transmon coherence. We present a quasi-one-dimensional analytical framework to minimise this loss, enabling rapid optimisation without computationally expensive 3D simulations. We compare uniform strips (V1) against linear (V2–V3) and optimised hybrid tapers (V4–V5). We demonstrate that geometric tapering suppresses wiring participation by up to 99.6%, reducing it from 0.0756 ppm (V1) to 0.0003 ppm (V4). Crucially, however, a simple linear taper (T1 ≈ 127.306 μs) yields coherence virtually indistinguishable from theoretically optimal complex profiles (T1 ≈ 127.323 μs) in the current pad-dominated regime. We thus establish a definitive design rule: standard linear tapering is sufficient to eliminate wiring loss as a bottleneck, rendering fabrication-sensitive complex shapes unnecessary for next-generation, low-loss devices.