1.3 Micron Photodetectors Enabled by the SPARK Effect

1. Introduction

Silicon (Si) is widely acknowledged as a cornerstone material in semiconductor technology, having been extensively studied during the golden era of microelectronics [1,2,3]. However, its intrinsic properties, including its indirect bandgap, impose significant constraints on its efficiency in photonic applications, particularly for devices like lasers and near-infrared photodetectors (NIR PDs) [4,5,6,7].

In recent years, graphene (Gr) and its two-dimensional counterparts have emerged as pivotal enablers of innovation in photonics and optoelectronics, thanks to their exceptional electronic, optical, and thermal properties [8,9,10,11,12]. Among the most promising applications of Gr is its integration into silicon-based PDs [13,14,15,16], particularly in waveguide-based architectures designed for near-infrared (NIR) detection [17,18,19]. These hybrid devices harness Gr unique characteristics for efficient conversion of light into electrical signals through several mechanisms.

One of the primary ways Gr PDs generate photocurrent is through the photovoltaic (PV) effect, where incident photons excite charge carriers at the Gr-Si interface, which, under the action of the built-in electric field are driven apart, inducing a current flow through an external load [20]. This mechanism is particularly effective in high-speed applications due to the ultrafast carrier dynamics in Gr. However, its responsivity remains moderate, typically between 0.1 and 0.36 A/W at 1550 nm [21,22]].

Beyond the photovoltaic response, Gr-based PDs can also exploit internal photoemission (IPE) [23,24,25], a process in which photons promote photoexcited carriers across an energy barrier into Gr, enhancing the PD response. This mechanism enables a modest but noticeable boost in responsivity, with values reaching approximately 0.37 A/W[15,16]. The efficiency of IPE-based devices largely depends on the interface quality and the energy alignment between Gr and the underlying material.

Another crucial mechanism is the photobolometric (PB) effect, which relies on Gr remarkable temperature sensitivity[26,27,28]. When incident light is absorbed, it locally heats the Gr layer, altering its electrical conductivity and leading to a measurable change in current. This effect is particularly valuable in scenarios where thermal fluctuations can be leveraged for enhanced detection, with devices achieving responsivity around 0.5 A/W [29].

A different yet highly promising approach is based on the photothermoelectric (PTE) effect, which takes advantage of Gr ability to generate a voltage in response to a temperature gradient. Unlike the other mechanisms, PTE-based devices operate efficiently in voltage mode, where responsivity is defined as (RV = Vph/Pinc) [30]. This approach has demonstrated remarkable results, with responsivity values ranging from 3.5 to 90 V/W at 1550 nm [31,32]. The ability to measure photovoltage directly without requiring an external bias makes PTE-based detectors highly attractive for energy-efficient and low-noise applications.

Multilayer structures composed of different materials play a crucial role in photonic applications, enabling enhanced light-matter interactions, tailored optical properties, and improved device performance [33,34,35,36]. By carefully engineering the composition and arrangement of these layers, researchers can achieve superior control over optical confinement, absorption, and carrier dynamics, which are essential for high-efficiency photodetection and modulation. A recent breakthrough in near-infrared light detection using Gr was achieved through the development of a hybrid waveguide structure composed of hydrogenated amorphous silicon (a-Si:H), Gr, and crystalline silicon (c-Si) [19,37]. By precisely embedding Gr within the waveguide, the interaction between the guided optical mode and defect states at the Gr/a-Si:H interface is significantly enhanced[19,38]. Under NIR optical illumination, these defect states release charge carriers into the Gr layer, modulating the thermionic current across the Gr/c-Si Schottky junction. This phenomenon, referred to as SPARK (Schottky barrier Photo-modulation ARising from the Key role of traps), enabled a record responsivity of 1.9 A/W at 1550 nm [19].

The SPARK mechanism is thoroughly discussed in Ref. [19], where it is demonstrated that the responsivity of the device critically depends on the product τ×η. In this context, τ refers to the carrier lifetime, a measure of how long charge carriers can persist before recombination, while η represents the dimensionless conversion efficiency. This efficiency quantifies the fraction of charges trapped at the a-Si:H/Gr interface that are efficiently released into the Gr layer for each incident photon. The τ×η product serves as a pivotal factor in understanding the device performance, as it reflects the intricate interplay between photon interactions and trap dynamics within the material. Importantly, this relationship is not static but is strongly influenced by the wavelength of the incoming light. The dependence on wavelength suggests a complex, multifaceted mechanism where material properties, interface quality, and photon energy work together to govern charge behavior. Such insights are fundamental for optimizing device design and tailoring performance across different spectral ranges.

To achieve this, we designed a hybrid waveguide combining a-Si:H and c-Si, embedding a single-layer Gr (SLG) sheet between these materials. Responsivity measurements revealed a strong dependence on incident optical power, reaching an interesting value of 0.3 A/W at a low optical power of 47 pW, corresponding to a noise-equivalent power (NEP) of 0.4 pW/Hz¹/². In this article, the experimental results provide a deeper understanding of the SPARK effect by determining the carrier efficiency/lifetime product at 1310 nm and comparing it with previously reported values at 1550 nm. The wavelength dependence of this product is analyzed and discussed, highlighting its implications. The real-time photocurrent response of the PD was characterized under a -10 V reverse bias, demonstrating a 3dB angular frequency in the MHz range. This response is governed by trap states in the detection mechanism, highlighting the trade-off between bandwidth and gain typical of Gr-based PDs utilizing the photogating effect. Therefore, while the response speed is limited, the high sensitivity of these PDs makes them ideal for power monitoring applications in photonic integrated circuits (PICs), where precise on-chip power measurements are necessary for tasks such as resonance frequency identification, system calibration, and phase correction in optical phased arrays (OPAs).

2. SPARK Effect Theory

To ensure this work is self-contained, we briefly revisit the SPARK effect as described in Ref. [19]. SPARK has been observed in metal-semiconductor-metal junctions, where one of the metals is Gr covered by a thin layer of a-Si:H. In principle, other amorphous materials could also be employed, as the key role is played by the traps localized at the interface between the amorphous material and Gr.

Under near-infrared (NIR) illumination, photons impart sufficient energy to trapped charge carriers, enabling them to overcome their binding potential and escape from localized trap states. Once freed, these carriers are subsequently transferred to the Gr layer, modifying its electronic properties. This charge injection process induces an upward shift in Gr Fermi level, effectively reducing the Schottky barrier at the Gr/c-Si interface. The decrease in barrier height facilitates carrier transport across the junction, thereby enhancing the thermionic emission current. This barrier modulation, directly linked to trap-assisted charge dynamics, has been experimentally validated through precise thermionic current measurements, confirming the fundamental role of trap states in governing the device optoelectronic response [19].

The detection mechanism is illustrated in the band diagram in Figure 1, which represents the behavior of the Gr/c-Si/Al junction under flatband voltage conditions [39]:

When a negative voltage is applied to the Gr electrode in relation to the grounded aluminum (Al) electrode, the Gr/p-Si junction is forward-biased, while the Al/p-Si junction is reverse-biased, leading to the energy band diagram shown in Figure 1 under dark conditions. As depicted in Figure 1, the current passing through the device prior to illumination (I_TD) is the total of the dark current, which is caused by thermionic emission of electrons overcoming the potential barrier (Φ_B^Gr) at the Gr contact ($I_{N,dark}^{Gr}$), and the thermionic emission of holes, which overcome the potential barrier (Φ_B^Al) at the Al contact (I_P^Al).

$$I_{TD}={I_{N,dark}^{Gr}+I}_P^{Al}={A_{Gr}{A}_N^{*}{T}^2{e}^{-{\displaystyle \frac{{q\varphi }_B^{Gr}}{kT}}}+A}_{Al}{A}_P^{*}{T}^2{e}^{-{\displaystyle \frac{{q\varphi }_B^{Al}}{kT}}}$$

(1)

Where A_Gr and A_Al represent the areas of Gr and Al in contact with c-Si respectively, T is the absolute temperature, k is the Boltzmann constant, and A^*_P and A^*_N are the Richardson constants for P-type and N-type silicon, respectively. As discussed in Ref. [37], the principle of current continuity requires that the total current in the metal-semiconductor-metal (MSM) structure be equal to the sum of the thermionic currents passing through both junctions.

Upon NIR illumination of the Gr active region, the observed increase in the total current flowing through the device (I_TL) indicates a reduction in the Schottky barrier ∆ϕ_B at the Gr/c-S interface [37].

$$I_{TL}={I_{N,light}^{Gr}+I}_P^{Al}=A_{Gr}{A}_N^{*}{T}^2{e}^{-{\displaystyle \frac{q\left({\varphi }_B^{Gr}-∆{\varphi }_B\right)}{kT}}}+A_{Al}{A}_P^{*}{T}^2{e}^{-{\displaystyle \frac{q{\varphi }_B^{Al}}{kT}}}$$

(2)

If the photogenerated current is defined as I_ph=I_TL-I_TD, we can write:

$$I_{Ph}=A_{Gr}{A}_N^{*}{T}^2{e}^{-{\displaystyle \frac{{q\varphi }_B^{Gr}}{kT}}}\left(e^{{\displaystyle \frac{q∆{\varphi }_B}{kT}}}-1\right)$$

(3)

On the other hands, the change in Schottky barrier ΔΦ_B under illumination can be defined as [37]:

$$q\Delta {\Phi }_B={\Delta E}_F^L-{\Delta E}_F^D=-sign\left(n_0+N_c\right)ћv_F\sqrt{\pi \left|n_0+N_c\right|}+sign\left(n_0\right)ћv_F\sqrt{\pi \left|n_0\right|}$$

(4)

Where $∆E_F^D=E_F^D-E_{FO}$ and $∆E_F^L=E_F^L-E_{FO}$ represent the differences between the Fermi level and the Dirac point under both dark and illuminated conditions, k_B is the Boltzmann constant, ћ is the Plank constant, v_F the Fermi velocity and n₀ is the capped Gr doping [40,41]. The parameter N_c refers to the charge carriers trapped at the a-Si:H/Gr interface, which are released into Gr upon illumination. The value of N_c is solely determined by the rate at which charges are generated and transferred from the a-Si:H interface to Gr. Defining the photon flux as $\psi ={\displaystyle \frac{P}{\left(h\nu \cdot A_{Gr}\right)}}$, where P is the incident optical power (in eV/s) able to illuminate the whole A_Gr active area of the a-Si:H/Gr interface (in cm²), and hν is the photon energy, N_c can be related to the photon flux using the following expression [19,37]:

$$N_c=\tau \bullet \eta \bullet {\displaystyle \frac{P}{\left(\hslash \omega \cdot A_{Gr}\right)}}$$

(5)

Where $\mathrm{ћ}\mathsf{\omega }$ is the photon energy, τ can be interpreted as the carrier lifetime, representing the average duration for which a trap remains occupied by a charge, while η denotes the conversion efficiency (dimensionless), which is the number of charges trapped at the a-Si:H/Gr interface that are released into Gr per incident photon. The conversion efficiency is influenced by the interaction between photons and traps. Considering Eqs. (3), (4) and (5), we can express the relationship as:

$$R={\displaystyle \frac{I_{Ph}}{P}}={\displaystyle \frac{A_{Gr}{A}_N^{*}{T}^2{e}^{-\frac{{q\varphi }_B^{Gr}}{kT}}}{P}}\left[e^{{\displaystyle \frac{\hslash v_F}{kT}}\bullet \left(-\sqrt{\pi \left|n_0-\tau \bullet \eta \left(P\right)\bullet {\displaystyle \frac{P}{\hslash \omega \bullet A_{Gr}}}\right|}+\sqrt{\pi \left|n_0\right|}\right)}-1\right]$$

(6)

This equation assumes that the transferred Gr inherently exhibits P-type doping and that no inversion of doping occurs in Gr under NIR illumination (|N_c|<|n₀|).Finally, by modelling the efficiency-lifetime carrier product as the power function τη(P) = α/P^β [37], by considering I_ph = G⋅P and under the assumption |N_c|<<|n₀|, we obtain:

$$G\cong \left[A_N^{*}{T}^2{e}^{-{\displaystyle \frac{{q\varphi }_B^{Gr}}{kT}}}\bullet \left({\displaystyle \frac{\pi }{2}}\bullet {\displaystyle \frac{\hslash v_F}{kT}}\bullet {\displaystyle \frac{\alpha }{\sqrt{\pi n_o}\bullet h\nu }}\right)\right]\bullet P^{-\beta }$$

(7)

where G represents the photo-gain, which is determined by the change in thermionic current resulting from the photo-induced modulation of the Gr Fermi level, facilitated by interfacial traps. Equation 7 clearly illustrates that the photo-gain G decreases as the optical power P increases, and that G is strongly influenced by the Gr Schottky barrier ${q\varphi }_B^{Gr}$.

3. Device Concept and Fabrication

The suggested PD utilizes a hybrid WG structure, integrating a-Si:H, SLG, and c-Si components, all precisely fabricated on a Silicon-On-Insulator (SOI) platform. The configuration employs a rib waveguide design, embedding SLG within the core, which consists of a-Si:H and c-Si, as depicted in Figure 2(a). This deliberate design focuses the optical mode at the SLG/a-Si:H interface, where a significant density of charge carriers becomes trapped [19].

Figure 2 (a) offers a detailed visualization of the active device, highlighting the aluminum (Al) electrode and the SLG positioned on c-Si. The junction formed by SLG/c-Si/Al represents a metal-semiconductor-metal (MSM) structure [39], with its associated energy band diagram illustrated in Figure 1. The a-Si:H layer plays a crucial role in this system due to its refractive index being closely aligned with that of c-Si, effectively minimizing optical discontinuities for the propagating infrared light. As discussed in the previous section, upon exposure to near-infrared light, the charges trapped at the a-Si:H interface are liberated into the SLG layer. This charge transfer triggers an upward shift in the SLG Fermi level, thereby reducing the Schottky barrier at the SLG/c-Si junction. This phenomenon can be detected through variations in the thermionic current. A detailed explanation of the fabrication procedure is provided below.

The production process was carefully planned to ensure compatibility with CMOS technology, employing low thermal-budget techniques aligned with the Back-End-of-Line (BEOL) requirements. To safeguard the structural integrity of the Gr, high-temperature treatments were intentionally scheduled at the beginning of the workflow.

The procedure began with an RCA cleaning protocol, which effectively removed contaminants from the SOI substrate to prevent potential defects in the final device.

Next, a thermal oxidation step was performed at 1100°C, a temperature that could potentially damage materials introduced in later stages, such as SLG and metallic contacts. Conducted in a controlled nitrogen atmosphere, this four-hour process yielded a 50 nm-thick silicon dioxide (SiO₂) layer. Selective etching of SiO₂ was subsequently performed using a Buffer Oxide Etch (BOE) solution, to realize the aluminum (Al) electrode. This step involves photolithography, aluminum (Al) thermal evaporation, and a lift-off process. To enhance adhesion between the metal and the substrate, thermal annealing was performed at 475°C for 30 minutes.

SLG, sourced from Graphenea Inc. (San Sebastian, Spain), was transferred onto the substrate and shaped into a 200 µm-long strip through photolithography and O₂ plasma dry etching. Electrical contacts with SLG were established through another photolithography step, followed by the thermal evaporation of Cr/Au (7/100 nm). The chromium (Cr) layer ensured strong adhesion between gold (Au) and the substrate, while a bilayer photoresist system facilitated a smooth lift-off process to prevent damage to the SLG.

The final phase involved defining the waveguides (WGs). A 110 nm-thick a-Si:H layer was deposited at 100°C using Plasma-Enhanced Chemical Vapor Deposition (PECVD). Photolithography and selective dry etching with a CF₄ and O₂ gas mixture were then used to pattern the rib waveguide. Lastly, the chip was cleaved, producing a 6.5 mm-long waveguide, as depicted in the SEM images displayed in Figure 2(b).

4. Experimental Results and Discussion

4.1. Electrical Characterization

The electrical performance of the devices was evaluated using a probe station paired with a Keithley 2410 Source Meter. Electrical contact was achieved using two precision metal probes, which were carefully placed on the device mounted on the probe station holder as displayed in Figure 3(a). These probes were attached to micromanipulators, securely fixed to the optical table via a vacuum system.

By varying the voltage applied across the electrodes, the resulting current flowing through the device was recorded, enabling analysis of the structure electrical properties and extraction of the I-V characteristics. Each I-V curve represents the average of three consecutive measurements.

The current-voltage (I-V) characteristics clearly demonstrated the Metal-Semiconductor-Metal (MSM) behavior of the Gr/c-Si/Al junction, as shown in Figure 3(b). This structure comprises two distinct Schottky interfaces: Gr/c-Si and Al/c-Si. When an external voltage was applied across the device, one junction operated under forward bias while the other was in reverse bias. A key parameter in this configuration is the flat-band voltage [39], which depends on factors such as the electron charge, the doping concentration of the semiconductor, the dielectric constant of silicon and the separation between the two electrodes. At this specific voltage, the c-Si layer becomes fully depleted, causing the energy bands at the reverse-biased junction to flatten.

4.2. Responsivity Measurements

To evaluate the PD responsivity, it is essential to accurately measure the optical power incident on the active region of the SLG, denoted as P_inc. It is important to highlight that the Gr absorption layer, measuring 200 μm in length, was integrated into a 6 mm-long optical waveguide.

The incident optical power was determined using a reference waveguide, fabricated specifically for this purpose and placed adjacent to the one containing the PD as shown in Figure 2(b). First, we measured the optical power output (P_out1) from the reference waveguide after coupling a known input optical power (P_inp), which was calibrated using a tapered optical fiber aligned with a commercial, calibrated free-space InGaAs photodiode. Next, the measurement was repeated with the waveguide containing the PD, yielding an output power value (P_out2). The difference between these two measurements (P_abs = P_out1 - P_out2) represents the optical power absorbed by the SLG.

The experimental setup, illustrated in Figure 4(a), is relatively straightforward. A continuous-wave 1310 nm laser source (Thorlabs MCLS1-CUSTOM) is modulated at 270 Hz using an external waveform generator producing an electrical square wave. Light is coupled into the waveguide via a tapered optical fiber, while the output light is collected by a multimode optical fiber with a core diameter of approximately 70 μm. The collected light is then converted into an electrical current by a calibrated InGaAs PD and subsequently analyzed using a lock-in amplifier.

Our experimental results indicate that P_out2 is negligibly small compared to P_out1. This suggests that nearly all the incident optical power is absorbed by the Gr strip, allowing us to approximate P_inc as being nearly equal to P_out1.

Measurements were performed by varying the maximum voltage of the electrical square wave (V_max) from 1.5 V to 5 V and recording the corresponding P_inc values. The results are presented in Figure 4(b).

To measure the photocurrent generated by the PD under test, a similar experimental setup was employed. While the input optical configuration remains unchanged, the output signal is now an electrical current extracted using two precision metal probes. These probes are connected to a transimpedance amplifier, which converts the photocurrent into a voltage signal. The transimpedance amplifier is also able to apply a bias of -10V to the PD. The resulting voltage is then measured using a lock-in amplifier for accurate analysis. The experimental setup and corresponding results are presented in Figure 5(a) and (b), respectively.

By the data shown in Figure 4(b) and in Figure 5(b) is possible to derive the responsivity as function of the incident optical power displayed in Figure 6(a).

Notably, the PD demonstrated a maximum responsivity of 0.3 A/W at a wavelength of 1310 nm and a bias voltage of -10V, corresponding to an incident optical power of approximately 47 pW. As the incident optical power increases, the responsivity gradually decreases and eventually stabilizes at approximately 0.17 A/W.

To further interpret these results, we fitted the experimental data presented in Figure 6(a) using Equation 6 described in Section 2. During the optimization process, the following parameters were employed: A_Gr=1.4 x 10-5 cm2, $A_N^{\mathrm{*}}$= 112 A/cm²K², T= 300 K, k_B = 8.61 x 10-5 eV/K, $\mathrm{\hslash }$ = 6.58·10-16 eVs, $v_F={1.1\bullet 10}^{8}cm/s$, $h\upsilon =0.95eV$, qΦ_B^Gr=0.56 eV [19] and n₀=0.24x10¹²cm^-3 [19]

The parameter τη(P_inc) was determined through the fitting procedure. Referring to [19], the carrier efficiency-lifetime product can be described as a power-law function τη(P_inc)=α/P^β_inc​. The fitting process produced values of α = 0.025 x 10⁻⁶ sW^β and β=0.2, with an R-square of 91%, indicating good agreement between the experimental data and the model (Figure 6(a)).

To further analyze the results, a comparison was made between the efficiency-lifetime carrier product at a wavelength of 1310 nm, as reported in this study, and that at 1550 nm, documented in [19] as shown in Figure 6(b). For 1310 nm, we obtainedτη(P_inc)= (0.025 x 10⁻⁶)/ (P_inc)^0.2 (s), while at 1550 nm, the expression was τη(P_inc)= (0.21 x 10⁻⁶)/ (P_inc)^0.19 (s). Notably, the parameter α exhibited a marked dependence on wavelength, while β remained nearly constant.

The dependence of the efficiency-lifetime carrier product τ⋅η on incident optical power at both wavelengths is illustrated in Figure 6(b). By using Eq. 7, it was demonstrated that the SPARK effect enhances gain by a factor of 8 at 1550 nm relative to 1310 nm. This strong wavelength dependence originates from a combination of factors, including the electronic properties of a-Si:H and the quality of both a-Si:H and the a-Si:H/SLG interface. It is well-known that a-Si:H is characterized by a high density of localized states within the bandgap due to structural disorder and the presence of dangling bonds. These states act as carrier traps, capturing electrons or holes and significantly affecting their lifetime τ and the efficiency of charge extraction η is governed by the ability of these trapped carriers to be released and subsequently transferred to Gr. The process of carrier release is influenced by both thermal excitation and optical excitation, which depend strongly on the energy distribution of trap states and the energy of the incident photons. At 1310 nm, the incident photons have a higher energy (~0.95 eV) compared to 1550 nm (~0.8 eV). It can be speculated here that this difference in photon energy may be responsible for the reduction in the overall charge transferred to SLG and may limit the τ⋅η product achieved at 1310 nm. The presence of higher-energy photons may enable charges to reach trap states with shorter lifetimes. Moreover, since at 1310 nm it can be assumed that deeper trap states are involved, it is possible that some re-trapping mechanisms occur and that they are responsible for the reduction in the τ⋅η product. Naturally, these considerations should be validated by experimental measurements on the materials in question, which we believe falls outside the scope of this manuscript.

The sensitivity of the system was evaluated using the noise equivalent power (NEP), which quantifies the optical power needed, per square root of bandwidth, to produce a photocurrent equivalent to the noise contribution[41]. NEP was calculated as NEP=i_n/R, where R=0.3 A/W at 47 pW, the dark current I_d=45 nA at -10 V (inset of Figure 3(b)), and $i_n=\sqrt{2q{I}_d}$​​. This yielded an NEP of 0.4 pWHz^−1/2.

4.3. Time Response

The real-time photocurrent response of the PD is depicted in Figure 7 (a). The time-dependent photocurrent of the PD was measured by periodically toggling a near-infrared laser on and off while applying a -10 V reverse bias as shown in Figure 7(a). Upon laser activation, the photocurrent rises to a saturation level and drops to a baseline (dark current) when the laser is turned off.

As illustrated in Figure 7(b), where the rising part of the real-time photocurrent response is reported, a rise time (t_r) of 22 μs, can be observed. The t_r is defined as the duration required for the photocurrent to escalate from 10% to 90% of its saturation value, and it is related to the angular frequency by the equation ω_3dB = 2π(0.35/t_r). Consequently, a 3dB angular frequency of approximately 0.1 MHz can be estimated. The limited response speed is attributed to the significant influence of trap states in the detection mechanism. The prolonged carrier lifetime (τ) typically impacts the device speed, a phenomenon previously observed in Gr PDs that utilize the photogating effect, where a balance must be struck between bandwidth and gain. Carrier lifetime is closely associated with the energy band structure, as well as with the defects and impurities, which are heavily dependent on the quality of the a-Si:H and the deposition process parameters. Therefore, meticulous defect engineering would be essential to optimize the efficiency-bandwidth product.

Our SPARK-based PDs exhibit high sensitivity, making them particularly suitable for power monitoring applications where high speeds are not required [42,43,44]. Within photonic integrated circuits (PICs), these detectors play a crucial role in measuring optical power levels. They operate by extracting minimal optical power at specific points in the circuit, ensuring the proper functioning of the system. On-chip power monitoring and calibration are essential for various tasks, such as tuning resonance frequencies in sensing circuits or compensating for phase errors in optical phased arrays (OPAs).

5. Conclusions

In this work, we have developed a Gr-based PD optimized for operation at 1310 nm, leveraging the SPARK effect within a hybrid waveguide structure composed of a-Si:H, Gr, and c-Si. The device demonstrates a peak responsivity of 0.3 A/W and a noise-equivalent power of 0.4 pW/Hz¹/², highlighting its high sensitivity. Experimental results provided valuable insights into the SPARK effect by determining the efficiency/lifetime product of carriers at 1310 nm and comparing it with 1550 nm, revealing the impact of wavelength dependence on device performance. Although the PD exhibits a limited response speed, with a rise time of 22 μs corresponding to a 3dB angular frequency of approximately 0.1 MHz due to the influence of trap states in the detection mechanism, this limitation can be addressed through advanced defect engineering and material optimization. Improvements in the quality and deposition parameters of the a-Si:H, as well as the exploration of alternative materials or passivation techniques, could significantly reduce carrier lifetimes and enhance the device response speed.

Despite its relatively slow response time, the PD high sensitivity and low noise-equivalent power make it particularly suitable for applications where speed is not critical. It is well-suited for power monitoring in photonic integrated circuits, enabling tasks such as on-chip calibration of optical power levels, identification of resonance frequencies, and phase correction in optical phased arrays. These applications often prioritize sensitivity and precision over high-speed operation, making the device an excellent fit. Additionally, the silicon-based fabrication approach is scalable and cost-effective, avoiding the need for sub-micron lithography and facilitating integration into large-scale photonic systems. These findings provide a strong foundation for future advancements aimed at improving the efficiency-bandwidth trade-off, enabling broader adoption of this technology in diverse integrated photonic applications.