Preprint Article Version 2 Preserved in Portico This version is not peer-reviewed

Research on Single Event Burnout Reinforcement Structure of SiC MOSFET

Version 1 : Received: 3 April 2024 / Approved: 4 April 2024 / Online: 4 April 2024 (12:58:50 CEST)
Version 2 : Received: 5 April 2024 / Approved: 10 April 2024 / Online: 10 April 2024 (15:46:49 CEST)

How to cite: Liao, Q.; Liu, H. Research on Single Event Burnout Reinforcement Structure of SiC MOSFET. Preprints 2024, 2024040339. https://doi.org/10.20944/preprints202404.0339.v2 Liao, Q.; Liu, H. Research on Single Event Burnout Reinforcement Structure of SiC MOSFET. Preprints 2024, 2024040339. https://doi.org/10.20944/preprints202404.0339.v2

Abstract

In this paper, the single event burnout(SEB) and reinforcement structure of 1200V SiC MOSFET (SG-SBD-MOSFET) with split gate and schottky barrier diode(SBD) embedded were studied. The device structure was established using Sentaurus TCAD, and the transient current changes of single event effect(SEE), SEB threshold voltage, as well as the regularity of electricfield peak distribution transfer were studied when heavy ions were incident from different regions of the device. Based on SEE analysis of new structural device, two reinforcement structure designs for SEB resistance were studied, namely the expansion of P+body contact area and the design of multi-layer N-type interval buffer layer. Firstly, two reinforcement schemes for SEB were analyzed separately, and then comprehensive design and analysis were carried out. The results showed that the SEB threshold voltage of heavy ions incident from the N+source region was increased by 16% when using the P+body contact area extension alone; When the device is reinforced with multi-layer N-type interval buffer layer alone, the SEB threshold voltage increases by 29%; The comprehensive use of P+body contact area expansion and multi-layer N-type interval buffer layer reinforcement increased the SEB threshold voltage by 33%. Overall, the breakdown voltage of the reinforced device decreased from 1632.935V to 1403.135V, which can be seen as reducing the remaining redundant voltage to 19%. The device performance was not significantly affected.

Keywords

power device; SiC MOSFET; split gate; SBD-embedded; single event effect; irradiation hardening

Subject

Physical Sciences, Other

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