Korobkov, M.A.; Vasilyev, F.V.; Khomutskaya, O.V. Analytical Model for Evaluating the Reliability of Vias and Plated Through-Hole Pads on PCBs. Inventions2023, 8, 77.
Korobkov, M.A.; Vasilyev, F.V.; Khomutskaya, O.V. Analytical Model for Evaluating the Reliability of Vias and Plated Through-Hole Pads on PCBs. Inventions 2023, 8, 77.
Korobkov, M.A.; Vasilyev, F.V.; Khomutskaya, O.V. Analytical Model for Evaluating the Reliability of Vias and Plated Through-Hole Pads on PCBs. Inventions2023, 8, 77.
Korobkov, M.A.; Vasilyev, F.V.; Khomutskaya, O.V. Analytical Model for Evaluating the Reliability of Vias and Plated Through-Hole Pads on PCBs. Inventions 2023, 8, 77.
Abstract
Nowadays there is a need to increase the density of interconnections on printed circuit boards (PCBs). Does this mean that the only way out for quality PCB manufacturing is to proportional increase in precision of equipment, or is there another way? One of the main constraints to increasing the density of PCB interconnections is the transition holes. As the number of conductive layers increases, the number of vias increases and they cover a significant space on the PCB. On the other hand, reducing the size of the vias is limited by the capability of spatial alignment of the PCB stack during manufacturing. There are standards that set limits for the design of contact pads on a PCB (IPC-A-600G, IPC-6012B). However, depending on the precision of production, the contact pads may be of poor quality. This raises the issue of determining the reliability of a contact pad with defined parameters at the design stage, taking into account manufacturing capabilities. This research proposes an analytical method for evaluation of reliability of a via or plated through-hole based on calculation of its probability of production in accordance with the current standards. On the basis of the method a model was developed both for the case of a contact pad without any conductors connected to it (nonfunctional contact pad) and for the real case with a connected conductor. The model estimates the probability of making an acceptable via for a given reliability class depending on parameters such as the conductor width (minimum permissible and usable), drilled hole diameter and pad diameter, as well as the accuracy of the drilling operation. The analysis of the modeling results showed that for the real case, a reduction in the reliability class would insignificantly affect the probability of making an acceptable via due to the tight limitation on the connection place of the conductor and the contact pad. In conclusion, we propose an algorithm for determining the optimal parameters of teardrops to minimize the negative impact of the conductor on the reliability of the vias.
Keywords
electronics reliability; design for reliability; design for manufacturing; PCB design rules; PCB vias; PCB plated through-hole pads; PCB teardrops
Subject
Engineering, Electrical and Electronic Engineering
Copyright:
This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
