Preprint Article Version 1 Preserved in Portico This version is not peer-reviewed

Investigation of a Low-Speed Commutation Voltage Shock Prob-Lem in Three-Level ANPC Inverter Hybrid Modulation Mode

Version 1 : Received: 14 December 2023 / Approved: 14 December 2023 / Online: 14 December 2023 (10:08:19 CET)

A peer-reviewed article of this Preprint also exists.

Yu, J.; Shen, R.; Zhou, L.; Jia, Z.; Hao, Y. Investigation of a Low-Speed Commutation Voltage Shock Problem in Three-Level ANPC Inverter with Hybrid Modulation Mode. Machines 2024, 12, 27. Yu, J.; Shen, R.; Zhou, L.; Jia, Z.; Hao, Y. Investigation of a Low-Speed Commutation Voltage Shock Problem in Three-Level ANPC Inverter with Hybrid Modulation Mode. Machines 2024, 12, 27.

Abstract

With the development of the photovoltaic industry, there will be an increasing demand for efficient, high-power density, and low-cost grid interface converters. Compared with two-level inverters, multilevel inverters have the following advantages: (1) lower device voltage ratings; (2) better output filtering spectrum; (3) lower electromagnetic interference (EMI) noise; and (4) higher switching speed capability. However, the complex switching circuit of the multilevel inverter will bring more parasitic inductance, resulting in more serious switching overvoltage (ringing). Consider that commonly used overvoltage absorption schemes are effective only for overvoltage or sup-pression of oscillations. Therefore, a new overvoltage absorption circuit is proposed in this paper, which can not only alleviate the overvoltage and ringing phenomena but also suppress the effect of voltage jumps during low-frequency switching on high-frequency input voltage. This overvoltage absorption circuit is characterized by low overvoltage, fast ringing damping, and minimum ca-pacitance. Experiments and simulations are conducted to verify the effectiveness of this overvoltage absorption circuit using a three-level ANPC inverter as a prototype. The results show that the proposed overvoltage absorption circuit can significantly reduce the overvoltage level, shorten the oscillation time, and reduce the voltage difference between the upper and lower DC bus capacitors.

Keywords

multilevel inverter; parasitic effects; overvoltage; ringing; voltage jumps

Subject

Engineering, Electrical and Electronic Engineering

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