Minimally Invasive Hypoglossal Nerve Stimulator Enabled by ECG Sensor and WPT to Manage Obstructive Sleep Apnea

1. Introduction

Obstructive sleep apnea (OSA) is a sleep disorder characterized by the partial or complete blockage of the upper airway. The most common symptoms are loud and frequent snoring, pauses in breathing during sleep, dry mouth, excessive daytime sleepiness, and morning headaches. This widespread condition places a significant burden on the healthcare system and affects nearly one billion people globally [1]. If left untreated, it can lead to serious health or quality-of-life-related problems, such as strokes, hypertension, cardiovascular disease, depression or anxiety, and hypnosis. Treatment options for OSA can be broadly categorized into non-invasive and invasive methods [2]. The most widely used non-invasive method is continuous positive airway pressure (CPAP). However, wearing the bulky CPAP device during treatment can be uncomfortable for some patients.

The advancement in neuroscience and electronics has led to the exploration of hypoglossal nerve stimulator (HGNS) as an increasing potential treatment option for OSA [4,5]. When a patient is experiencing OSA, the hypoglossal nerve can be electrically stimulated to contract the genioglossus muscle, thereby opening the blocked upper airway. It provides a success rate of approximately 76% which is highly comparable with CPAP [6].

Conventional HGNS consist of three components: a breathing sensor, a generator, and stimulating electrodes, as is seen in Figure 1 [3]. Each of these three parts is located in a different area of the body and is connected to the other through leads. Using the breathing sensor, the generator analyzes whether the patient is under OSA or not in order to determine whether to send a mild stimulation command to the stimulation lead. As a result of this stimulation, the upper airway can remain open during sleep. The main three parts require at least three implantation surgeries, increasing the risk of safety issues[3]. For control and communication purposes, an external remote controller with Bluetooth functionality is employed to trigger and adjust this implantable stimulator. It’s important to note that accommodating both the battery and breathing sensor within the implantable device consumes a substantial amount of invasive space. Furthermore, the battery in this system has a limited lifespan and may require a second surgery for replacement, resulting in additional trauma for the patient [7].

Decades of research on implantable electrical stimulation have brought significant benefits to patients with neural or muscular disorders. Examples of mature implantable biomedical devices include cardiac pacemakers, while other areas of active research include visual prostheses and cochlear implants [8]. These implants utilized the wireless power transfer (WPT) technique to divide the device into internal and external of the body to minimize the volume of the implantable components. However, the research on HGNS remains largely focused on treatment outcome analysis, subject group, surgery procedure improvement, and comparison with other techniques [7]. The improvement of the HGNS system in terms of structure is rarely mentioned.

In this context, we introduce an innovative ECG and WPT-based hypoglossal nerve stimulator, referred to as EWHGNS, with the aim of overcoming the limitations inherent in conventional HGNS systems. The proposed EWHGNS device is designed to be both compact and highly flexible for communication and stimulation purposes. As shown in Figure 1, the EWHGNS comprises two core components: an external controller and an implantable generator. The external controller collects the ECG data and employs a CNN algorithm for OSA detection. Upon identifying an apnea episode, this user interface controller promptly transmits stimulating details and energy to the implant. To power the implantable generator, an inductive link is employed. This implantable generator is a highly integrated System-on-Chip (SoC) that incorporates a power management module to convert AC to DC. The generator is strategically connected to electrodes in close proximity to the hypoglossal nerve, minimizing the length of the leads and reducing the trauma area associated with implantation.

The EWHGNS system presents two noteworthy contributions. Firstly, our study presents a pioneering method in the treatment of OSA by introducing an ECG-based wireless-powered implantable hypoglossal nerve stimulator. This approach represents a pioneering advancement in the treatment of OSA. The EWHGNS system innovatively separates the conventional HGNS into internal and external components, effectively reducing the size of the implant. The external component of the system employs an ECG monitor and a CNN algorithm to analyze abnormal breathing patterns. This external device encompasses an OSA detector, an OSA digital signal processor (DSP), a BPSK modulator, and a power amplifier. The internal component of the EWHGNS system is responsible for receiving AC power and stimulation parameters from the external controller. It then converts the AC power into DC to provide power to the other circuit blocks housed within the EWHGNS. Meanwhile, the EWHGNS system performs demodulation of the stimulation parameters and executes biphasic constant current stimulation, contributing to its effectiveness in addressing OSA.

Secondly, each component within the implant showcases exceptional performance when compared to other research studies in their respective independent research fields. To illustrate, the proposed ECG-based OSA detector attains an impressive accuracy of 88.68%, surpassing k-nearest neighbor (k-NN), support vector machine (SVM), and recurrent neural network (RNN) classification methods in monitoring abnormal breathing patterns associated with OSA. Regarding the wireless power link, it achieves a measured power conversion efficiency (PCE) of 31.8% when tested with a 5mm skin thickness and a receiving coil diameter of 9mm. Notably, the power management module, occupying a compact area of only 0.06$m{m}^2$, delivers a remarkable power conversion efficiency of 77.5%. It also provides the flexibility to supply three distinct voltages (1.2V, 1.8V, 3.1V). Lastly, a phase-locked loop (PLL)-based BPSK demodulator is designed with an exceptionally low power consumption of only 42$\mu$W.

The paper is organized into six sections. We describe in Section 2 the functional implementation requirements, which include the OSA detector, hypoglossal nerve-electrode interface, stimulation parameters, voltage considerations, WPT, data exchange, and architecture of the proposed EWHGNS system for the OSA treatment application. Section 3 focuses on the methods and materials employed in the EWHGNS system, providing a detailed explanation of the design of each individual block. In Section 4, the paper presents the simulation and measurement results obtained for the EWHGNS system. Finally, we draw a conclusion in Section 5.

2. Considerations of the EWHGNS

In implantable biomedical devices, various essential functional blocks are commonly utilized, including power management, data telemetry, control unit, and stimulator to meet the requirements of low-power consumption, very-small size, high reliability, and stability [9,10]. Nonetheless, it is crucial to recognize that there are specific challenges to be addressed depending on the unique requirements of each application. Variability can arise in aspects such as the interface with an external controller, the number of channels, stimulation parameters, and circuit design. As a pioneer in the quest to minimize the size of the hypoglossal nerve stimulator implant, we intend to provide detailed specifications related to the management of OSA from an application-oriented perspective in the forthcoming subsections.

2.1. OSA Detector

Detecting abnormalities in respiratory patterns accurately is crucial for assessing the efficacy of stimulation within the proposed EWHGNS. To begin, a thorough examination of wearable techniques suitable for monitoring OSA was conducted, as depicted in Table 1. Subsequently, Section IV will provide a detailed illustration of the chosen method’s implementation.

Polysomnography (PSG) is considered to be the gold standard for diagnosing OSA. It can simultaneously monitor multiple physiological modalities through various signal-acquisition devices during sleep. These modalities include brain activity (measured by electroencephalography or EEG), eye movements (measured by electrooculography or EOG), muscle activity (measured by electromyography or EMG), heart rate, breathing, oxygen levels, and snoring sounds [11]. However, obtaining a clinical diagnosis can be costly and time-consuming and typically requires laboratory testing, leading to challenges in monitoring patients in a residential setting with flexibility.

In accordance with previous research [12], it has been established that the Electrocardiogram (ECG) stands out as the most promising wearable approach for detecting Obstructive Sleep Apnea (OSA), thanks to advancements in algorithms. The movement of the throat during each breathing cycle, as air fills and empties from the lungs, induces variations in the relative position of the electrodes concerning the heart. These variations can be effectively detected by monitoring changes in the amplitude information of the ECG [13]. The analysis of ECG data associated with OSA often involves the classification of changes in the amplitude of R- or S-waves, as well as the size of the QRS complexes, through ECG-derived-respiratory (EDR) analysis [14]. It’s noteworthy that ECG-based approaches consistently demonstrate superior sensitivity and specificity in comparison to sound-based techniques and remote-based methods [12].

Sound-based respiratory monitoring, for instance, is susceptible to interference from a multitude of factors including coughing, wheezing, and ambient noises originating from both the surroundings and the body. Moreover, the scarcity of appropriate acoustic datasets poses a substantial challenge when considering this method for our specific application [13]. Remote-based techniques, although promising for comfortable breathing monitoring, often exhibit limitations in accuracy due to the subject’s movements and activities [15].

Given these considerations, the ECG emerges as the optimal choice for the external OSA detector in our context.

2.2. Hypoglossal Nerve-Electrode Interface

In neuroprosthetic applications, the impedance of the electrode-nerve interface is critical to be considered as it directly influences the voltage supplied by the stimulator during maximum-intensity stimulation. This impedance can be simplified by employing an assembly of passive components that comprises a series-connected resistor ($R_s$) followed by a parallel combination of the resistor ($R_p$) and the capacitor ($C_p$) [10]. $R_s$ is the nerve impedance, $C_p$ is the double-layer nonlinear interface capacitance, and $R_p$, representing a substantial impedance, mimics the hindrance encountered during charge transfer which models the reduction and oxidation reactions within a state of electrochemical equilibrium. Then, this model is further simplified as a series resistor $R_{tot}$ and a series capacitor $C_{tot}$. The impedance $R_{tot}$ can vary within a broad range depending on the application, typically from 200 $\mathsf{\Omega }$ to 10 $k\mathsf{\Omega }$ [16]. The impedance of the hypoglossal nerve-electrode interface (HNEI) is estimated to have an $R_{tot}$ value of 0.8 $k\mathsf{\Omega }$, as reported in [17].

For further assessing the impedance of the HNEI value, we measured the interface of an adult rabbit’s sciatic nerve and cuff electrodes. Figure 2 illustrates the experimental setup in animal testing using a rabbit model. The diameter of the sciatic nerve of this rabbit is 0.6 mm. The cuff electrode employed is crafted from high-purity platinum with a wire diameter of 0.1 mm and an electrode diameter of 1 mm. The spacing between two electrodes is maintained at 1 mm. Utilizing the VMP-300 measurement system, we determined the equivalent impedance values as follows: $R_s$ (series resistance) of 1.7 $k\mathsf{\Omega }$, $R_p$ (parallel resistance) of 8.4 $M\mathsf{\Omega }$, and $C_p$ (parallel capacitance) of 7.8 $\mu F$. The measured impedance waveforms between two electrodes and the equivalent passive component circuit parameters are shown in Figure 3. Given the diameter of the hypoglossal nerve in humans is around 4 mm, we opted for $R_{tot}$ of 1 $k\mathsf{\Omega }$ in this particular study. Considering 7.8 $\mu F$ plays almost a neglectable impact during stimulation as the voltage between the large capacitor is almost zero during one stimulation cycle, here we select $C_{tot}$ of 400 $nF$.

2.3. Stimulation Parameters

Although specific optimal stimulation parameters for managing OSA have not been explicitly documented, valuable insights can be gained from previous research on hypoglossal nerve stimulation [18]. Based on it, we adopted a bipolar biphasic current generator in our experimental setup. The selected stimulation frequency was configured at 1.67 KHz (150$\mu$s), comprising of an anode stimulation (50$\mu$s), discharge function (10$\mu$s), cathode stimulation (50$\mu$s), and discharge function (40$\mu$s) per cycle. To regulate the amplitude of the stimulation intensity, we employed a digital-to-analog converter (DAC)-based current generator. This device allows for programmable current intensities within a range of 0 to 2.4 mA with a resolution of 5 bits [19].

2.4. Voltage Consideration

To achieve a maximum current of 2.4 mA through an impedance of $R_{tot}$ equal to 1 $k\mathsf{\Omega }$ and a total capacitance of $C_{tot}$ equal to 400 nF during the positive stimulation period of 50 µs, a minimum DC voltage of 2.7 V is required, as calculated by the following equation:

$$V=I_{max}·R_{tot}+\frac{I_{max}·\Delta t_{pos}}{C_{tot}}$$

(1)

Within the EWHGNS system, the control unit typically operates with a power supply voltage of 1.2 V to minimize power consumption and align with technological process requirements. However, certain aspects of the system necessitate a higher voltage of 1.8 V. In the current reference circuit of a DAC-based current generator, a cascade current mirror structure is employed. This specific configuration serves to mitigate the channel length modulation effect and enhance the output impedance, ultimately leading to improved precision in the current reference generation. To support the high-precision current reference of this cascade structure, a voltage of 1.8 V is mandated. To accommodate these distinct voltage requirements, the EWHGNS system incorporates a dedicated power management module, which facilitates the provision of 1.2 V, 1.8 V, and 3.1 V supplies as needed for different components within the system [20].

2.5. Wireless Power Transfer

Inductive coupling is a prevailing WPT method used in implantable applications. The main goal of designing an inductive link is to minimize the size of the implantable coil while maximizing power transfer efficiency(PTE), as mentioned in [4]. PTE, a metric for WPT efficiency, is influenced by factors such as the dimensions of the coil and the depth of implantation.

Compensated capacitors have also been leveraged to boost PTE by utilizing resonance effects and mitigating system sensitivity to misalignment. The serial-parallel (SP) topology is generally preferred for the implantable part to supply high current compared with serial-serial (SS) topology [21].

2.5.1. Specific Absorption Rate

Specific absorption rate (SAR) quantifies the amount of wireless energy absorbed by the human body and should be carefully evaluated in the design of WPT systems for biomedical applications. It can be calculated using the equation:

$$SAR=\frac{\sigma ·E^2}{m_d}$$

(2)

where $\sigma$ represents the tissue conductivity, E denotes the electric field, and $m_d$ represents the mass density.

2.5.2. Operating Frequency

The direct correlation between tissue conductivity and operating frequency suggests that higher frequencies may lead to increased tissue conductivity, resulting in a potentially higher SAR [22]. To comply with SAR limitations, it is preferable to use lower operating frequencies. Improper and frequent switching of the active comparator in the PMM can result in multiple-pulsing issues that lead to the erroneous turn-on of large-size power transistors and large leakage currents [23]. To address these issues, one potential approach is to lower the switching frequency.

Furthermore, higher frequencies are more sensitive to $△I/△t$ transient in rectifier design. When a comparator compares a sine wave voltage with the ground using a high-frequency switch, a significant resonance can occur because of rapid changes in current and parasitic inductance [24]. To attain optimal performance of the comparator, it is essential to mitigate the impact of parasitic inductance within the chip. This can be accomplished by incorporating additional parallel pads and increasing the width of the layout line. However, it is important to note that implementing more parallel pads and wider layout lines can result in a substantial increase in chip area. Lowering the operating frequency is an alternative method.

We employed a frequency of 2 MHz for both power and communication bands in our proposed EWHGNS device to facilitate initial functional verification. Overall, this operating frequency has been carefully considered regarding the limitations of SAR, power management performance, and chip area requirements that were previously mentioned.

2.6. Data Exchange

BPSK signal has been widely adopted as the downlink data communication through an inductive link for WPT [25]. In BPSK, binary data is encoded using two distinct phase states of the carrier signal. BPSK exhibits a constant envelope, ensuring that the power level of the transmitted signal remains consistent, thereby minimizing dynamic power loss [26]. In this context, a BPSK demodulator was selected to receive information from the external controller. For the EWHGNS system, the implant utilizes a 10-bit data format for unidirectional wireless communication, enabling constant current stimulation to ensure preliminary functional verification. Specifically, it includes three bits dedicated to determining the onset and offset of stimulation, an additional five bits for controlling the stimulation amplitude ranging from 0 to 2.4 mA, one bit for specifying the stimulation polarity (anode or cathode), one bit to enable or disable charge balancing.

2.7. Architecture of the EWHGNS

To ensure the fulfillment of the aforementioned requirements and considerations, the main parameters are compiled in Table 2, and the proposed global architecture is illustrated in Figure 4.

The EWHGNS device comprises both an external controller and an implant. The external controller consists of several components, including an ECG-based Obstructive Sleep Apnea (OSA) detector, an external control unit (CU), a modulator, and a power amplifier. The signal processing workflow for ECG-based OSA detection encompasses the following steps in sequence: raw ECG signal acquisition, signal preprocessing, signal segmentation, feature extraction, and classification. The OSA detector provides real-time monitoring for patients, offering immediate feedback on the presence or absence of OSA (healthy). In instances where abnormal breathing patterns are detected, the OSA detector communicates signals to the CU. Subsequently, the CU initiates the transmission of power and stimulation parameters to the implant via a modulator and a power amplifier.

The implant is composed of four essential components: a power management module (PMM), a data exchange unit, an internal Control Unit (CU), and a biphasic current stimulating output stage Module. This implant receives an alternating current (AC) supply through an inductive link, which is then transformed into a direct current (DC) voltage via a rectifier within the PMM.

However, this DC voltage is susceptible to fluctuations in the external controller’s power supply, as well as variations in the power conversion efficiency (PCE) of WPT. To mitigate this, a bandgap reference (BGR) is engineered to generate a consistent amplitude, regardless of power supply variations. Following this, low-dropout (LDO) voltage regulators are designed to provide three distinct voltage levels (1.2V, 1.8V, and 3.1V), requiring a high power supply rejection ratio (PSRR) to ensure a constant wireless voltage supply to the implants.

Simultaneously, the stimulation signal is demodulated by the data exchange Unit, which subsequently transmits this data to the internal CU. The CU then forwards the data to the biphasic current stimulating output stage to execute the corresponding stimulating parameters for the hypoglossal nerve-electrode interface.

3. Design and Implementation of The Proposed System

3.1. OSA Detector

Figure 5 showcases the concrete implementation of the architecture of the ECG-based OSA detector. The process commences with raw ECG recordings, which undergo signal preprocessing steps. These steps involve passing the signals through a low-noise amplifier and a low-pass filter to eliminate unwanted noise. Subsequently, an analog-digital converter (ADC) converts the preprocessed analog signals into digital format. Once the ECG signals are preprocessed, they undergo segmentation to extract relevant features.

The CNN divides the signals into segments, enabling the extraction of essential features. These features are then utilized in the classification of OSA behavior (normal or OSA). The processing element (PE) array is employed to execute operations of the neural network. Each PE houses a local memory, which serves the function of storing the weight parameters. The matrix multiplication and accumulation are done by this edge accelerator as hardware implementation of the network. Regarding the network structure, five convolutional blocks are used in the ECG-based OSA detection task, which contains the convolutional, activation, and max pooling layer, respectively. Each convolutional kernel employs 1D-CNN, which is effective in capturing features from subsequences for one-dimensional temporal signals. The global average pooling layer and fully connected layer are performed on the previous feature map extracted by convolutional blocks. The output layer contains two neurons, which correspond to two classifications (healthy, OSA) in the OSA detection task.

3.2. Wireless Power Transfer

We designed an inductive link with the aim of improving PTE while taking into account SAR considerations. The Federal Communications Commission (FCC) has established specific limits for the SAR of WPT in biological tissues. These limits are set at 1.6 and 2 W/kg for 1 and 10 g of tissues, respectively[27]. Our initial design involved the size of the coils and the depth at which the coil would be implanted. Since the target for hypoglossal nerve stimulation is located near the mandible where the skin depth is relatively shallow, we set the depth of the implantable coil at 5 mm. Additionally, the outer diameter of the receiving coil was initially established at 9 mm.

The PTE is based on the equivalent load resistance seen from the power supply [28], expressed as follows:

$${\eta }_{{}_{\mathit{WPT}}}=\frac{k^2{Q}_1{Q}_L}{1+k^2{Q}_1{Q}_L}·\frac{Q_2}{Q_2+Q_L}$$

(3)

where k is the coupling coefficient of two coils that equal to $M/\sqrt{L_1{L}_2}$, $Q_1$ is the quality of coil 1 = $\omega L_1/R_1$, $\omega$ is the angular frequency that is defined as 2$\pi$ times the operating frequency f, and $Q_L$ is the quality of load = $1/\left(R_2/\omega L_2+\omega L_2/R_L\right)$. The expression for PTE is obtained under resonant conditions by incorporating compensated capacitors. Notably, ${\eta }_{WPT}$ is dependent on the values of the inductances $L_1$ and $L_2$, mutual inductance M, the load resistance, and the operating frequency.

To precisely analyze the magnetic parameters of both coils, we used COMSOL software to construct a physical magnetic model. The optimal coil sizes were selected using the optimum PTE process [22], by tuning the coil radius and the number of turns.

3.3. Power Management Module

This power management module comprises an active doubler-based rectifier, BGR, and three independent LDO regulators to provide the required regulated DC constant voltages, as reported in [20].

3.3.1. Rectifier Circuit

The full-wave gate cross-coupled rectifier is preferred in this project due to its higher voltage conversion ratio when compared to a passive rectifier. Large-size transistors are employed to minimize the threshold voltage of the main path transistors and reduce power conduction loss [21].

The proposed structure of the active doubler-based rectifier is shown in Figure 6. It includes two comparators (CMP1 and CMP2), large-sized NMOS M1 and PMOS M3, and auxiliary PMOSs M5 and M6 to ensure that the M3 current flows from the source to the drain. Additionally, it includes two transistors (M2 and M4) to start up the circuit, an off-chip bootstrap capacitor C3, and an off-chip filter capacitor C4. IGND is the abbreviation of implant-level ground which differs from the external ground. Both comparators are powered by the output of the rectifier, denoted as $V_{REC}$.

The operation principle is described in several steps. First, when $V_{IN}$ is in the negative phase, which is less than $V_{DS}$ of M1, M1 powers up to charge C3. When $V_{IN}$ is at the lowest point, $V_{C3}$ equals $V_{IN,max}-V_{DS1}$[29]. In Figure 6(b), when $V_{VD}$ is less than IGND, the current flowing through M10 is greater than that of the one flowing through M7 and M9 branches. This results in a low-voltage level at the drain of M10 and a high-voltage output at $V_{CN}$ to power up M1. Subsequently, $V_{IN}$ enters a positive phase, and $V_{VD}$ is higher than zero volt. The output of CMP1 $V_{CN}$ is a low-voltage signal to turn off M1. With an increase in $V_{IN}$, $V_{VD}$ also increases to stabilize the charge of C3. If $V_{VD}$ is higher than the sum of $V_{OUT}$ and $V_{SD}$ of M3, then M3 powers up to enable the current to flow to the loads $R_L$ and $C_4$. A schematic of CMP2 is presented in Figure 6(c), with a similar working principle to that of CMP1.

3.3.2. Bandgap Reference Circuit

The BGR is an essential component of LDO voltage regulators, which require a high power supply rejection ratio (PSRR) to provide constant voltage to implants. In our implantable application, a decoupling on-chip capacitor was integrated between the power supply and the output of the operational amplifier (opamp) to improve the PSRR of the BGR circuit [30]. This on-chip capacitor is highlighted in yellow in Figure 7.

The BGR circuit comprises a BGR central component, a folded-cascade amplifier, a startup circuit, and a control signal. The control signals, $V_{EN}$ and $V_{EP}$, function as a complementary pair of voltages to activate or deactivate the BGR circuit. The central part of the BGR circuit is composed of two branches, each consisting of a bipolar junction transistor (BJT) and a PMOS transistor. It is important to note that the impedance of $R_{3a}$ and $R_{3b}$ is designed to be the same, requiring careful layout considerations for proper matching. The inputs of the folded-cascade amplifier, denoted as $V_{+}$ and $V_{-}$, are designed to maintain almost identical voltages. The current $I_{b2}$ in the right branch of the BGR circuit can be obtained by subtracting the collector voltages of $Q_1$ and $Q_2$ and then dividing it by the impedance of $R_4$. The output voltage $V_{bg}$ is then determined by the expression $I_{b2}·R_{3b}+V_{+}$. To deliver the output of the BGR circuit denoted as $V_{REF}$, a low-pass filter is typically employed to filter out any high-frequency noise or disturbances.

3.3.3. Low-Dropout Regulator Circuit

The LDO circuit consists of an error amplifier, a power transistor, a buffer, and a load, as shown in Figure 8. The main pole is located at the load, whereas the second pole corresponds to the output of the error amplifier, which connects to the gate of the power transistor. To handle a high current, a power transistor must be large in size. The large size of such a transistor, however, implies a large capacitor. As a result, it may create this second pole close to the main pole, which may give rise to instability issues. In order to address this issue and improve stability, a buffer is placed between the error amplifier and the power transistor. The buffer transistor ($M_{61}$) has a considerably smaller size than the power transistor ($M_{63}$), which extends the frequency range of the second pole and enhances stability.

The three LDO regulators were designed to deliver 1.2 V, 1.8 V, and 3.1 V. They operate independently, ensuring simultaneous output of their respective voltages with minimal or negligible interactions. For the error amplifier, one input is connected to the BGR’s output, $V_{REF}$, which provides a stable and reliable reference voltage. The other input monitors a fraction of the LDO regulator’s output voltage, obtained through an impedance divider, denoted as $V_{FB}$. By comparing $V_{REF}$ with the monitored $V_{FB}$, the error amplifier accurately controls the LDO regulator’s output voltage. This feedback mechanism ensures precise voltage regulation, allowing each LDO regulator to independently maintain its desired output voltage level.

3.4. Binary Phase-Shift Keying based Data Communication

In BPSK, each bit of digital data is represented by a phase shift of the carrier signal. Specifically, a phase shift of 180 degrees is utilized to represent the change in data between 1 and 0, or vice versa. The BPSK demodulator was designed based on the architecture reported in [31], and is illustrated in Figure 9.

The maximum data rate of the BPSK demodulator is set at 0.06 Mb/s, and it operates with a carrier frequency of 2 MHz. This demodulator consists of a self-biased PLL (SB-PLL) and digital demodulation circuits. The self-biased PLL is used to recover the carrier signal, which is used as the clock signal of the digital demodulation circuits. By setting the current of the current-control oscillator (CCO) proportional to the current of the charge pump (CPs) and using a source-degeneration-resistor-based voltage to current (V2I), a relevant constant loop bandwidth of our SB-PLL can be obtained. As a result, the SB-PLL can robustly operate over process, voltage, and temperature (PVT) variations, which enables a low supply voltage to save power consumption. The phase frequency detector (PFD) output signals (UP and DN) in the PLL are also used to detect if the date transition occurs by the trigger detector based on the pulse width comparison scheme. The data recovery block is used to get the demodulated data ($D_{DEM}$), and the resettable-divider-based clock recovery block is used to remove phase shift from data transition and obtain a clock with the same rate of $D_{DEM}$. Finally, the recovered data is retimed by the recovered clock. Thus, the synchronous clock and data signal are obtained for the whole implanted system.

3.5. Output Stage of Biphasic Current Stimulation

A biphasic current stimulating output stage (OS) was purposefully designed during the initial validation of the proposed EWHGNS system. The schematic diagram is illustrated in Figure 10. Within this schematic, a 5-bit current controller is intricately designed to generate a 5-bit programmable current, directly correlated to the input code ($D_0$ - $D_4$). The CCS is responsible for managing the activation and deactivation of this current generator. Subsequently, this current is duplicated using a current mirror circuit comprised of transistors $M_5$ through $M_7$. The control signals ($P_1$ - $P_4$) are deployed to regulate the activation of transistors $M_1$ through $M_4$, facilitating the control of current flow in either direction through the Hypoglossal Nerve-Electrode Interface (HNEI) load. This HNEI is linked to two electrodes, indicated by the red and blue dots.

This circuit can be simplified into the model depicted in the upper right block. When $P_1$ and $P_4$ are turned on, while $P_2$ and $P_3$ are turned off, current $I_{out}$ traverses from the red electrode (left) to the blue electrode (right). Conversely, when $P_1$ and $P_4$ are turned off, and $P_2$ and $P_3$ are turned on, current $I_{out}$ flows in the opposite direction. When $P_1$ and $P_2$ are activated, and $P_3$ and $P_4$ are deactivated, the capacitor discharges into the power supply. Conversely, when $P_1$ and $P_2$ are deactivated, and $P_3$ and $P_4$ are activated, the capacitor discharges into the ground. The power supply, denoted as $V_{OUT3}$, is derived from the output of the LDO regulator, set to provide a voltage of 3.1 volts.

4. Results

The presented results can be divided into three parts: 1) Regarding the external controller, the verification of the OSA detector was carried out using the CNN algorithm with ECG signals as raw data. 2) The results related to the WPT link were obtained through a combination of modeling, simulation, and experimental analysis. 3) For the implant part of the EWHGNS, the performance of the PMM, BPSK modulation scheme, and biphasic current stimulating output stage was evaluated based on post-layout simulations and experimental measurements.

4.1. OSA Detector Result

To validate and evaluate the performance of the proposed OSA detector, we conduct the experiment on Apnea-ECG database [32], which is a public open-source dataset in PhysioNet. The dataset contains 70 individual ECG signals, recorded at a sampling rate of 100 Hz. Each ECG trace was labeled by an expert for apnea-related and normal annotations through minute-by-minute respiration and related signals. In the experiment, we randomly select 28 records for the training dataset and 7 records for the validation dataset. We segment the recording signal into periods of 60s and 120s after the bandpass filter as the preprocessing function.

Table 3 shows the result analysis and comparison for the proposed method. In the experiments, the accuracy (ACC), sensitivity (SEN), specificity (SPE), precision (PRE), and F1-score are used to evaluate the network performance. During the validation process, given the sample length of 60 s, the model obtains an accuracy of 86.74%, a sensitivity of 93.52%, a specificity of 84.23%, and an F1-score of 85.95%. It achieves comparative results over many traditional methods as shown in the table. Furthermore, increasing the segment length of the recorded signal leads to an improvement in classification results. The high sensitivity in the validation dataset indicates the system’s capacity to accurately issue alarms upon detecting abnormal breathing states, which is of great importance in timely and appropriate clinical intervention.

4.2. Wireless Power Transfer Link Results

In our study, we utilized COMSOL to construct a 2D axisymmetric model consisting of two concentric coils, as is shown in Figure 11. The primary coil, referred to as Tx, was implemented using the Coil Setting in COMSOL. It was modeled as a homogenized multiturn conductor, with the number of turns set to 9. Similarly, the receiving coil, denoted as RX, had a similar configuration to Tx with the number of turns set to 4. To assess the SAR, we performed simulations by applying a current of 1 A to the primary coil, Tx. The SAR values were then evaluated within the model. Figure 11 showed that the SAR value for a tissue with a mass of 0.5 $kg$ was 0.001 $W/kg$ using the proposed coil parameters. In our simulation, the SAR values are indeed expected to be higher in the vicinity of the excited coil, where the electromagnetic fields are more concentrated.

To enable WPT, customized inductive coils were used. These coils were created with the aid of a high-precision automatic winding machine, as illustrated in Figure 12. The electrical parameters of the coils were obtained by converting the scattering parameters measured using a Keysight ENA Network Analyzer E5071C. The mutual and self-inductance values were derived from the S-parameters. The transmitting coil had a diameter of 35 mm, while the receiving coil had a diameter of 9.2 mm. In the case of 5mm pork thickness, which simulates the skin, the measurement showed that s21 was -4.99 dB and its corresponding PTE was 31.8%.

Table 4 shows a comparison of our inductive WPT system for biomedical implants with other studies reported in the literature. In the previous study [35], a receiver coil with a ferrite core, having a diameter of 22 mm, was utilized, resulting in a high power transfer efficiency(PTE) of 76.3%. However, the use of a ferrite core could result in a high value of SAR, which was not provided in [35]. This high SAR level can potentially have adverse effects on human tissues. In contrast, a millimeter-sized receiver coil was proposed in [36], but the achieved PTE was limited to 1.4%, with a coupling value of only 3.5e-3. Another study [37] achieved a PTE of 18% for the WPT link.

In the current study, the PTE achieved is lower compared to the previous study [35], with a value of 38.2%. However, in this study, the SAR is effectively managed and maintained at a limited level of only 0.001 W/kg, without the use of a ferrite core. Under the SAR limit of 2 W/kg for 10 g tissue, the maximum power delivery to the load in this paper is 20 mW much higher than the value of 2.2 mW in [35]. The utilization of a smaller receiver coil diameter of 9 mm in this study poses a challenge in achieving a high PTE.

4.3. Implant Results

4.3.1. Power Management Module

To verify the operation analysis of the active doubler-based rectifier introduced in Figure 6, a schematic simulation was performed, and the transient results are displayed in Figure 13. When the voltage $V_{VD}$ is lower than IGND, the comparator CMP1 detects this condition and switches its output, $V_{CN}$, to a high voltage level. This change in voltage activates the transistor $M_1$, causing current to flow from IGND to $V_{IN}$ through $M_1$, resulting in the charging of capacitor $C_3$. Similarly, when the voltage $V_{VD}$ exceeds $V_{REC}$, another comparator, CMP2, senses this condition and switches its output, $V_{CP}$, to a low voltage level. This low voltage level triggers the main power transistor $M_3$, allowing current to flow to the load. In the simulation, the input voltage amplitude was set to 1.6 V, and the operating frequency was 2 MHz. The output of the rectifier measured 2.78 V with a load impedance of 1 k$\mathsf{\Omega }$.

Furthermore, a post-layout simulation was conducted to analyze the transient behavior of the PMM during startup. The simulation results are illustrated in Figure 14. Initially, the power transistor $M_1$ acts as a diode when the input voltage $V_{IN}$ is higher than $V_{REC}$. As the load capacitor charges over time, the rectifier switches into active operation, functioning as a doubler rectifier. In this simulation, the input voltage amplitude was set to 2.6 V, and the output of the rectifier reached 3.3 V. Additionally, the PMM incorporated three LDOs providing output voltages of 1.26, 1.83, and 3.14 V, respectively. Each LDO was connected to a load with a resistance of 1 k$\mathsf{\Omega }$.

The PMM components of the NIHGHS were fabricated using the 40 nm process available at Taiwan Semiconductor Manufacturing Co. LTD (TSMC). The total area, without the PADs, is 543 $\mu$m × 117$\mu$m. A photomicrograph of the PMM is shown in Figure 15. The measurement setup for the PMM is illustrated in Figure 16. It consisted of an arbitrary function generator and a mixed-signal oscilloscope (Keysight MSOS604A).

The voltage waveform resulting from the measurement of the rectifier is presented in Figure 17. It operated at a frequency of 2 MHz, with an AC input amplitude of 1.18 V. Under these conditions, the rectifier generated a DC output of 2 V when connected to a load impedance of 1 k$\mathsf{\Omega }$. However, due to the coupling of input noise to the $V_{VD}$ node and the charge and discharge of the load capacitor, an output ripple voltage was observed in the rectifier. As shown in Figure 17, the rectifier exhibited a peak-to-peak ripple of 0.15 V.

In Figure 18, the relationship between the measured power conversion efficiency (PCE) and voltage conversion ratio (VCR) as a function of the load impedance is plotted. The PCE represents the ratio of the power received by the receiving coil to the power drawn by the load, expressed as follows:

$${\eta }_{{}_{\mathit{REC}}}=\frac{P_{OUT}}{P_{AC}}=\left|\frac{\frac{V_{OUT}^2}{R_L}}{\frac{1}{Td}{\int }_{t_0}^{t_0+Td}{V}_{AC}\left(t\right)·I_{AC}\left(t\right)dt}\right|$$

(4)

where VCR is defined as the ratio of $V_{REC}$ to $V_{IN}$. At an input amplitude of 1.18 V and a load impedance of 1 k$\mathsf{\Omega }$, the maximum value of VCE was 1.69. However, the PCE was only 77.5% under these conditions, which is suboptimal. The PCE reached its optimal value of 79% at a load impedance of 1.2 k$\mathsf{\Omega }$. As the load impedance increases beyond this point, the PCE showed a declining trend, while VCE did not vary significantly. For this measurement, we maintained $V_{REC}$ constant at 2 V and the frequency at 2 MHz, while tuning the load impedance and input voltage.

Figure 19 illustrates the measured PCE of the active doubler-based rectifier at various operating frequencies ranging from 0.5 to 5 MHz. The maximum amplitude of the input voltage, denoted as $V_{IN}$, is set to 1.18 V, and the load impedance is 1 k$\mathsf{\Omega }$. It is observed that as the operating frequency increases, a noticeable degradation in PCE occurs, particularly beyond 2 MHz. This degradation can be attributed to the increasing coupling effect between the $V_{VD}$ and $V_{CN}$ nodes, resulting from the presence of a parasitic capacitor in the circuit.

The stronger coupling effect at higher frequencies disrupts the normal switching operation of transistor $M_1$, which is controlled by the comparator CMP1. As a consequence, the efficiency of power conversion is compromised. Similarly, the presence of a parasitic capacitor between the $V_{VD}$ and $V_{CP}$ nodes introduces a stronger coupling effect, further deteriorating the performance of the rectifier at higher operating frequencies. The abnormal switch behavior of the power transistor $M_3$ controlled by another comparator aggravates the decrease in PCE. Managing coupling effects and minimizing the impact of parasitic capacitances are critical challenges in the design of an active rectifier, particularly when aiming to improve PCE at a higher operating frequency.

The relationship between the input voltage supply and the output voltage of the LDO is illustrated in Figure 20, which is designed to deliver a voltage of 3.1 V. Based on the measurement results, it has been observed that when the voltage supply varies between 2.5 V and 3.2 V, while keeping the load impedance at a constant value of 1 k$\mathsf{\Omega }$, the output exhibits a linear increase. At a supply voltage of 3.2 V, the output voltage reaches 3.09 V. Furthermore, as the supply voltage continues to increase beyond 3.24 V, the LDO maintains a stable output voltage of 3.1 V, which indicates a voltage dropout of 0.13 V. It demonstrates that within a certain range of input voltages, the LDO can regulate the output voltage at 3.1 V effectively.

We conducted measurements of the output of LDO3 at various load currents, using a power supply with a constant voltage of 3.3 V. When the load current was 0.1 mA, the LDO3 output was measured to be 3.17 V, which dropped to 3.1 V as the load current increased to 3 mA. The output ripple was measured to be 0.06 V when the load current varied from 0.1 mA to 3 mA, as is shown in Figure 21. The maximum PCE of LDO3 was achieved when it delivered a load current of 3 mA, at which point the LDO3 output voltage was 3.1 V. It was calculated as the ratio of the output power to the input power. This maximum PCE was estimated to be 93.9% (3.1 V / 3.3 V) × 100%, under the assumption that the current of other branches in LDO3 was negligible compared to the load current of 3 mA. The overall PCE of this proposed PMM was calculated to be 72.9% under the load impedance of 1 k$\mathsf{\Omega }$. The calculation is provided as:

$${\eta }_{PMM}={\eta }_{REC}\times {\eta }_{LDO}$$

(5)

Table 5 presents a comprehensive comparison between previous power management systems for implantable devices and the proposed PMM. The PMM offers significant improvements over the system described in [35], which had a limited output voltage of 1.8 V. In contrast, the PMM provides a wider range of voltage options, including 1.2, 1.8, and 3.1 V, increasing the flexibility and adaptability of the device. One notable achievement of the PMM is its significantly reduced chip area, measuring just 0.06 $m{m}^2$ (excluding PADs), in contrast to the dimensions reported in [35] (0.12 $m{m}^2$) and [38] (0.3 $m{m}^2$). This significant reduction in size was achieved through the utilization of smaller power transistors within the active doubler-based rectifier and LDO regulators. This downsizing did result in a slight decrease in the PCE of the PMM. In terms of PCE, the active voltage doubler presented in [39] achieved the highest efficiency of 92.2%. However, it did not integrate LDOs nor offer the integrated chip area.

4.3.2. Binary Phase-Shift Keying Building Block

Firstly, this proposed PLL-based BPSK demodulator was verified through simulation. The results of the post-layout simulation with a data rate of 62.5 kb/s are presented in Figure 22. As shown in this figure, the recovered synchronous data and 50% duty-cycle clock signal are denoted as $D_{OUT}$ and $C{K}_{OUT}$, respectively, which were separately recovered by the BPSK demodulator. The modulation signal is represented by $D_{IN}$, while $B_{IN}$ denotes the carrier signal after modulation. To improve waveform clarity, a short period of time for $B_{IN}$ was trimmed.

To further validate the functionality of the proposed BPSK demodulator, a proof-of-concept prototype featuring discrete components was designed. The phase frequency detector (PFD) is constructed using a D-type flip-flop SN74AUP1G79, while the self-biased charge pump is assembled using components including a current generator (ALD1116), a current mirror (ALD1117), and two switches (ADG609BN). The voltage-controlled oscillator is created with a MAX2471, and the digital circuitry is implemented through a digital XOR gate, an inverter, and multiple D-type flip-flops.

Figure 23 shows the input data of the modulated BPSK digital signal and demodulated data. It’s worth noting that, due to the electrical characteristics of the discrete components, the power supply utilized in this testbench is set at 3.3 volts. The results indicate a successful demodulation of the data using this architectural configuration.

The BPSK demodulator presented in this work had a low power consumption of 42 $\mu$W at a 0.7-V supply voltage. It’s worth noting that this supply voltage was derived by tapping a fraction of the output voltage from an LDO regulator that provides a stable 1.2 V. As shown in Table 6, this work achieved lower power consumption than the recently reported BPSK demodulators. Moreover, this demodulator exhibited excellent energy efficiency compared to PLL-based BPSK demodulators for high-Q coil telemetry. Although PLL-less BPSK demodulators in [40] exhibited better energy efficiency due to their high data rates, they were not suitable for high-Q telemetry owing to their open-loop structure.

4.3.3. Output Stage of Biphasic Current Stimulation

The simulation results are presented in Figure 24. "Dis_Gnd" signifies that the capacitor discharges into the ground, while "Dis_Vdd" indicates discharging into the power supply. "Neg" denotes that the current flows from right to left in Figure 10, whereas "Pos" signifies a current flow in the opposite direction. Clearly, the simulation results show that the voltage between the two electrodes accurately reflects the expected current flow direction.

A proof-of-concept prototype, constructed using discrete components, was devised to validate the proposed architecture. The 5-bit current controller is realized through the use of multiple NMOS current mirrors (ALD1116), while the PMOS current mirror is implemented with the ALD1117. Furthermore, four switches are fashioned using ADG609BN. The waveforms obtained from measurements are depicted in Figure 25.

To evaluate the initial functionality of the stimulator, a load comprising a 1 k$\mathsf{\Omega }$ resistor in series with a 400 nF capacitor was employed under stimulation currents of 1.2 mA. The results conclusively demonstrate that this structure fulfills the biphasic function requirements essential for the proposed EWHGNS system.

5. CONCLUSION

We have developed a miniaturized ECG and WPT-based hypoglossal nerve stimulation microsystem as an innovative solution for addressing patients with OSA. This device integrates several essential components, including an external OSA detector based on ECG, customized winding coils, a Power Management Module, a BPSK demodulator, and a biphasic current stimulator. The ECG-based OSA detector demonstrated a high accuracy of 88.68% in monitoring episodes of apnea. The design of the inductive link coils took into consideration factors such as SAR limitations, PTE, and coil size to maximize overall performance. The WPT link achieved a PTE of 31.8% with a 5 mm distance between the transmitter and receiver coils. The receiver coil had a diameter of 9 mm. The PMM consisted of an active doubler-based rectifier, a bandgap reference, and three LDOs. It delivered three DC voltages required for different components and achieved a power conversion efficiency (PCE) of 74% while occupying an area of only 0.25 $m{m}^2$. The BPSK demodulator, based on PLL technology, exhibited a low power consumption of 42 $\mu$W and supported a data rate of 0.0625 Mb/s. Currently, a new version of the system is undertaken to complete the whole device and corresponding packaging.