Preprint Article Version 1 Preserved in Portico This version is not peer-reviewed

Back-channel Etched In-Ga-Zn-O Thin-film Transistor Utilizing Selective Wet-Etching of Copper Source and Drain

Version 1 : Received: 27 September 2021 / Approved: 30 September 2021 / Online: 30 September 2021 (13:09:28 CEST)

A peer-reviewed article of this Preprint also exists.

Khan, R.; Misran, M.A.B.; Ohtaki, M.; Song, J.T.; Ishihara, T.; Hattori, R. Back-Channel Etched In-Ga-Zn-O Thin-Film Transistor Utilizing Selective Wet-Etching of Copper Source and Drain. Processes 2021, 9, 2193. Khan, R.; Misran, M.A.B.; Ohtaki, M.; Song, J.T.; Ishihara, T.; Hattori, R. Back-Channel Etched In-Ga-Zn-O Thin-Film Transistor Utilizing Selective Wet-Etching of Copper Source and Drain. Processes 2021, 9, 2193.

Abstract

The electrical performance of the back-channel etched Indium–Gallium–Zinc–Oxide (IGZO) thin-film transistors (TFTs) with copper (Cu) source and drain (S/D) which are patterned by a selective etchant was investigated. The Cu S/D were fabricated on molybdenum (Mo) layer to prevent the Cu diffusion to the active layer (IGZO). We deposited the Cu layer using thermal evaporation and performed the selective wet etching of Cu using non-acidic special etchant without damaging the IGZO active layer. We fabricated the IGZO TFTs and compare the performance in terms of linear and saturation region mobility, threshold voltage and ON current (ION). The IGZO TFTs with Mo/Cu S/D exhibits good electrical properties as the linear region mobility is 12.3 cm2/V-s, saturation region mobility is 11 cm2/V-s, threshold voltage is 1.2 V and ION is 3.16 x 10-6 A. We patterned all the layers by photolithography process. Finally, we introduced SiO2-ESL layer to protect the device from the external influence. The results show that the prevention of Cu and introduced ESL layer enhances the electrical properties of IGZO TFTs.

Keywords

Cu Thermal diffusion; Selective etching of Cu; Barrier layer; DC Sputtering; IGZO TFTs

Subject

Engineering, Electrical and Electronic Engineering

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