Preprint Article Version 1 Preserved in Portico This version is not peer-reviewed

Optimal IP Current Controller Design Based on Small Signal Stability for THD Reduction of High-Power Density PFC Boost Converter

Version 1 : Received: 16 November 2020 / Approved: 17 November 2020 / Online: 17 November 2020 (11:47:20 CET)

How to cite: Okilly, A.H.; Baek, J. Optimal IP Current Controller Design Based on Small Signal Stability for THD Reduction of High-Power Density PFC Boost Converter. Preprints 2020, 2020110447 (doi: 10.20944/preprints202011.0447.v1). Okilly, A.H.; Baek, J. Optimal IP Current Controller Design Based on Small Signal Stability for THD Reduction of High-Power Density PFC Boost Converter. Preprints 2020, 2020110447 (doi: 10.20944/preprints202011.0447.v1).

Abstract

This paper presents an optimal design for the inner current control loop of the continuous current conduction mode (CCM) power factor correction (PFC) stage, which it can be used as the front stage of the two stages alternating current-direct current (AC-DC) telecom power supply. Conventional single-phase CCM-PFC boost converter usually implemented with using of the proportional-integral (PI) controllers in both of the voltage and current control loops, to regulate the output DC voltage to the specified value, moreover to maintains the input current follows the input voltage which offers converter with high power factor (P.F) and low current total harmonic distortion (THD). However, due to the slow dynamic response of the PI controller at the zero-crossing point of the input supply current, input current can’t fully follow the input voltage which leads to high THD. Digitally controlled PFC converter with an optimal design of the inner current control loop using doubly control loops IP controller to reduce the THD and to offer input current with unity P.F was performed in this paper. Furthermore, for the economic design of the digitally control PFC converter, two isolated AC and DC voltage sensors are proposed and designed for the interfacing with the microcontroller unit (MCU). PSIM software was used to test the converter performance with using the proposed designed current controllers and isolated voltage sensors. High power density digitally controlled telecom PFC stage with P.F of about 99.93%, full load efficiency of about 98.70% and THD less 5.50% is achieved in this work.

Subject Areas

CCM-PFC; small signal model; IP controller; zero-crossing point; total harmonic distortion (THD); power factor (P.F); isolated voltage sensors

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