Working Paper Article Version 1 This version is not peer-reviewed

Automated Detection and Classification of Defective and Abnormal Dies in Wafer Images

Version 1 : Received: 6 April 2020 / Approved: 7 April 2020 / Online: 7 April 2020 (11:30:38 CEST)

A peer-reviewed article of this Preprint also exists.

Chen, H.-C. Automated Detection and Classification of Defective and Abnormal Dies in Wafer Images. Appl. Sci. 2020, 10, 3423. Chen, H.-C. Automated Detection and Classification of Defective and Abnormal Dies in Wafer Images. Appl. Sci. 2020, 10, 3423.

Journal reference: Appl. Sci. 2020, 10, 3423
DOI: 10.3390/app10103423

Abstract

This article presents an automated vision-based algorithm for the die-scale inspection of wafer images captured using scanning acoustic tomography (SAT). This algorithm can find defective and abnormal die-scale patterns, and produce a wafer map to visualize the distribution of defects and anomalies on the wafer. The main procedures include standard template extraction, die detection through template matching, pattern candidate prediction through clustering, and pattern classification through deep learning. To conduct the template matching, we first introduce a two-step method to obtain a standard template from the original SAT image. Subsequently, a majority of the die patterns are detected through template matching. Thereafter, the columns and rows arranged from the detected dies are predicted using a clustering method; thus, an initial wafer map is produced. This map is composed of detected die patterns and predicted pattern candidates. In the final phase of the proposed algorithm, we implement a deep learning-based model to determine defective and abnormal patterns in the wafer map. The experimental results verified the effectiveness and efficiency of our proposed algorithm. In conclusion, the proposed method performs well in identifying defective and abnormal die patterns, and produces a wafer map that presents important information for solving wafer fabrication issues.

Subject Areas

automated visual inspection; convolutional neural network; deep learning; pattern classification; semiconductor inspection; wafer map

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