Preprint Article Version 1 This version is not peer-reviewed

Energy Efficient Tri-State CNFET Ternary Logic Gates

Version 1 : Received: 26 December 2018 / Approved: 28 December 2018 / Online: 28 December 2018 (03:54:46 CET)

How to cite: Tabrizchi, S.; Sharifi, F.; Badawy, A.A. Energy Efficient Tri-State CNFET Ternary Logic Gates. Preprints 2018, 2018120325 (doi: 10.20944/preprints201812.0325.v1). Tabrizchi, S.; Sharifi, F.; Badawy, A.A. Energy Efficient Tri-State CNFET Ternary Logic Gates. Preprints 2018, 2018120325 (doi: 10.20944/preprints201812.0325.v1).

Abstract

Traditional silicon binary circuits continue to face challenges such as high leakage power dissipation and large area of interconnections. Multiple-Valued Logic (MVL) and nano-devices are two feasible solutions to overcome these problems. In this paper, we present a novel method to design ternary logic circuits based on Carbon Nanotube Field Effect Transistors (CNFETs). The proposed designs use the unique properties of CNFETs, e.g., adjusting the Carbon Nanotube (CNT) diameters to have the desired threshold voltage and have the same mobility of P-FET and N-FET transistors. Each of our designed logic circuits implements a logic function and its complementary via a control signal. Also, these circuits have a high impedance state which saves power while the circuits are not in use. We show a more detailed application of our approach by designing a two-digit adder-subtractor circuit. We simulate the proposed ternary circuits using HSPICE via standard 32nm CNFET technology. The simulation results indicate the correct operation of the designs under different process, voltage and temperature (PVT) variations. Moreover, we designed a two-digit adder/subtractor and a power efficient ternary logic ALU based on the proposed gates. Simulation results show that the two-digit adder/subtractor using our proposed gates has 12X and 5X lower power consumption and PDP (power delay product) respectively, compared to previous designs.

Subject Areas

multiple valued logic (MVL); CNFET; energy-efficiency; nano-electronics; ternary logic, adder, ALU

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