Version 1
: Received: 10 March 2018 / Approved: 12 March 2018 / Online: 12 March 2018 (06:46:12 CET)
How to cite:
Aganah, K.; Luciano, C.; Ndoye, M.; Murphy, G. New Switched-Dual-Source Multilevel Inverter for Symmetrical and Asymmetrical Operation. Preprints2018, 2018030081. https://doi.org/10.20944/preprints201803.0081.v1
Aganah, K.; Luciano, C.; Ndoye, M.; Murphy, G. New Switched-Dual-Source Multilevel Inverter for Symmetrical and Asymmetrical Operation. Preprints 2018, 2018030081. https://doi.org/10.20944/preprints201803.0081.v1
Aganah, K.; Luciano, C.; Ndoye, M.; Murphy, G. New Switched-Dual-Source Multilevel Inverter for Symmetrical and Asymmetrical Operation. Preprints2018, 2018030081. https://doi.org/10.20944/preprints201803.0081.v1
APA Style
Aganah, K., Luciano, C., Ndoye, M., & Murphy, G. (2018). New Switched-Dual-Source Multilevel Inverter for Symmetrical and Asymmetrical Operation. Preprints. https://doi.org/10.20944/preprints201803.0081.v1
Chicago/Turabian Style
Aganah, K., Mandoye Ndoye and Gregory Murphy. 2018 "New Switched-Dual-Source Multilevel Inverter for Symmetrical and Asymmetrical Operation" Preprints. https://doi.org/10.20944/preprints201803.0081.v1
Abstract
The past two decades has seen a growing demand for high-power, high-voltage utility scale inverters mostly fueled by the integration of large solar PV and wind farms. Multilevel inverters have emerged as the industry choice for these megawatt range inverters because their reduced voltage stress, capable of generating an almost sinusoidal voltage, in-built redundancy, among others. This paper present a new Switched-Source Multilevel Inverter (SS MLI) architecture. The new inverter show superior over existing topologies. It has reduced voltage stress on the semiconductor, uses less number of switches –reduced size/weight/cost and increased efficiency. The new SSMLI is comprised of two voltage sources (V1, V2) and 6 switches. It is capable of generating 5-level output voltage in symmetric modes (i.e., V1 = V2), and 7-level output voltage in asymmetric modes (i.e., V1 ≠ V2). To demonstrate the validity of the proposed inverter, simulations results using MATLAB® /Simulink® for 5- and 7-level output voltages are presented . The simulations are also verified experimentally using a laboratory prototype.
Keywords
multilevel; inverter; single phase; reduced switch-count; h-bridge
Subject
Engineering, Electrical and Electronic Engineering
Copyright:
This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
