Preprint Article Version 1 This version not peer reviewed

An Implementation of Real-Time Phased Array Radar Fundamental Functions on DSP-Focused, High-Performance Embedded Computing Platform

Version 1 : Received: 22 July 2016 / Approved: 23 July 2016 / Online: 23 July 2016 (10:43:50 CEST)

A peer-reviewed article of this Preprint also exists.

Yu, X.; Zhang, Y.; Patel, A.; Zahrai, A.; Weber, M. An Implementation of Real-Time Phased Array Radar Fundamental Functions on a DSP-Focused, High-Performance, Embedded Computing Platform. Aerospace 2016, 3, 28. Yu, X.; Zhang, Y.; Patel, A.; Zahrai, A.; Weber, M. An Implementation of Real-Time Phased Array Radar Fundamental Functions on a DSP-Focused, High-Performance, Embedded Computing Platform. Aerospace 2016, 3, 28.

Journal reference: Aerospace 2016, 3, 28
DOI: 10.3390/aerospace3030028

Abstract

This paper investigates the feasibility of a backend design for real-time, multiple-channel processing digital phased array system, particularly for high-performance embedded computing platforms constructed of using general purpose digital signal processors. Frist, we obtained the lab-scale backend performance benchmark from simulating beamforming, pulse compression, and Doppler filtering based on MicroTCA chassis using Serial RapidIO protocol in backplane communication. Next, a field-scale demonstrator of a multifunctional phased array radar is emulated by using the similar configuration. Interestingly, the performance of a barebone design is compared to that of emerging tools that systematically take advantage of parallelism and multicore capabilities, including Open Computing Language.

Subject Areas

phased array radar; embedded computing; serial RapidIO, MPAR

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