Photonic Integrated Circuits: A Fabrication-Aware Tutorial from Material Selection to Packaging

The performance of photonic integrated circuits (PICs) is governed by the extent to which intrinsic material properties are realized in fabricated device geometries and in the associated optical, electrical, and thermal interfaces. This tutorial traces this materials-to-manufacturing translation from platform selection and electromagnetic design through layout generation, nanofabrication, metrology and characterization, and ultimately packaging. It analyzes how dimensional bias, sidewall and surface roughness, redeposition, thin-film stress, contamination, cladding choice, and facet preparation influence key figures of merit, including propagation loss, phase fidelity, coupling efficiency, modulation performance, and nonlinear frequency conversion. Established and emerging PIC platforms are compared in terms of functional capability, process limitations, and measurement context, with explicit separation of intrinsic material attributes from isolated device demonstrations and from evidence of manufacturability. Design and simulation workflows are linked to process variability, design-rule verification, and experimentally measured geometry. Fabrication pathways based on lithography and laser writing, including the integration of tuning elements, are discussed with emphasis on interdependencies among sequential process steps. Within-study attenuation contrasts and a residual-loss analysis are used to quantify how remaining loss channels constrain the net benefit of specific interventions. Case studies then apply these concepts to low-loss routing, electro-optic functionality, programmable photonic circuits, and thin-film ferroelectric poling. Collectively, the presented framework supports informed selection of compatible platforms and process flows, identification of diagnostically relevant measurements, and rigorous assessment of proposed improvements against circuit-level performance requirements.