Coherence as the Organising Principle for Centralised ADAS: Distributed Antenna Front-Ends and a Unified ADAS Integrated Electronic Control Unit

Automotive perception is migrating from self-contained edge sensors toward satellite architectures in which lightly processed data is streamed to a central compute unit. That migration is already underway commercially, and cost reduction is the reason usually given for it. This paper argues that cost is the least interesting consequence of centralisation, and that the decisive one has been largely overlooked: the choice of where to partition the receive chain determines whether the vehicle’s separate radar apertures can be combined phase-coherently into a single synthetic aperture. We define a partition-point taxonomy (P0–P5) for the automotive radar receive chain and show that the two partition points which preserve a shared frequency reference — analogue IF transport (P1) and raw-ADC transport (P2) — enable an aperture whose extent is set by the vehicle, not by the sensor module. We propose an architecture in which each mounting point carries only a Remote Antenna Front-End (RAFE: array, LNA, mixer, frequency multiplier, IF conditioning — no ADC, no DSP, no MCU, no PHY), connected to a unified ADAS Integrated ECU (AIECU) by a single coaxial cable carrying DC power, an up-link frequency reference, and a frequency-division-multiplexed down-link of the IF channels. Quantitatively, for four 3Tx×4Rx panels distributed across a 0.61 m fascia at 79 GHz: the virtual aperture grows from 20.87 mm to 0.605 m, the -3 dB beamwidth narrows from 8.49◦ to 0.255◦, and the Cramér–Rao bound on azimuth improves by 36.5 dB. In single-snapshot Monte Carlo the measured azimuth RMSE at 15 dB SNR improves from 0.203◦ to 0.0028◦, a factor of 71. Two-target resolution at 90 % probability improves from 4.5◦ to 0.15◦. These gains are gated by an unforgiving synchronisation requirement that we quantify: a 0.5 dB coherent-gain budget allows an inter-node RMS carrier-phase error of 0.339 rad, equivalent to 0.68 ps of residual delay or 102 µm of panel displacement at 79 GHz. Timestamp synchronisation cannot approach this — IEEE 802.1AS gPTP at 100 ns corresponds to 4.96 × 10⁴ rad — and neither can an open-loop shared reference, because thermal drift of a 3.5 m coaxial feed at 60 ppm/K over a 145 K automotive range produces 145 ps, or 11.5 whole cycles of carrier phase. We show that closed-loop loopback delay calibration closes the gap, requiring 46 dB of calibration SNR over a 200 MHz sweep against an available link SNR of 96.7 dB. We report a negative result that constrains the design space: the per-node beam is far too broad to disambiguate the coherent aperture. The optimised sparse array’s first grating lobe sits at 1.89◦, while the node beamwidth is 10.42◦, so node-level gating provides no ambiguity protection whatsoever. Ambiguity must instead be managed by co-array-aware panel placement, which reduces the peak sidelobe from -0.20 dB to -3.20 dB and the ambiguity rate at -6 dB SNR from 64.5 % to 21.3 %. At system level, worst-case sensor-to-actuation latency falls from 32.8 ms to 19.6 ms; Monte Carlo over triangular cost distributions gives a mean BOM reduction of 31.8 % against edge sensors (90 % interval $195–$552) and 24.0 % against satellite radar; and a fault-tree analysis shows that the architecture reaches an ASIL-D PMHF of 3.5 × 10⁻⁹/h only when the AIECU is genuinely fail-operational, tolerating a common-cause factor up to β = 0.20.