Submitted:
15 April 2026
Posted:
17 April 2026
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Abstract
Keywords:
1. Introduction: Why Crossbars?

2. What is a Spintronic Device?
- Reference layer: Fixed magnetization.
- Free layer: Magnetization can be switched.

3. The Crossbar Architecture: Inputs and Outputs
- Rows (word lines): Carry input voltages. In our context, these are the signals we want to process, for example, sensor voltages.
- Columns (bit lines): Carry output currents. These are the results of the computation.
- Device at (i,j): Has a programmable conductance
- Ohm’s Law: Multiplication is performed by the conductance at the junction (
- 2.
- Kirchhoff’s Current Law: Addition is performed as currents from all rows merge into the column wire.

4. Binary (Single-Level) Operation
- Non-volatile: state is retained without power.
- Fast: switching in nanoseconds.
- Endurance: virtually unlimited write cycles.

5. Multi-Level (Analog) Operation

6. Programming the Crossbar
7. What the Crossbar Reads and Outputs
7.1. Inputs
- Rows: Analog voltages (continuous values) or digital voltages (binary). These are the signals we want to process, for example, sensor readings, cell voltages, or control signals.
- Programming: During programming, current pulses are applied to set the conductances. This is done once before operation.
7.2. Outputs
- Columns: Analog currents, given by
- Binary case: Output is a weighted sum with binary weights (either
- Multi-level case: Output is a true analog weighted sum with continuous weights.
- Directly used as control signals (e.g., to trigger comparators).
- Converted to digital via ADCs for further processing. The resolution of the Analog-to-Digital Converter (ADC) must match the precision of the crossbar. For example:
- Fed into another crossbar for multi-layer computations.
8. Types of Spintronic Crossbars: State of the Art
| Type | Device | Levels | Output | Status | Reference |
| Binary STT-MRAM | Standard MTJ | 2 | Binary-weighted analog | Commercial | [4] (overview of spintronic memristors) or product datasheet |
| Multi-level STT-MRAM | Granular MTJ | 4+ | Continuous analog | Research | [1] (Gupte et al., npj Unconventional Computing, 2026) |
| SOT-MRAM | MTJ with heavy metal | 2 | Binary-weighted analog | Emerging | [3] (Zvezdin, SpinEdge seminar, 2025) or [5] (Deng et al., Advanced Functional Materials, 2024) |
| Domain-Wall | MTJ with extended track | Multiple | Analog | Research | [4] (general spintronics review) or classic reference (e.g., Parkin et al., Science, 2008) |
8.1. Binary STT-MRAM
- Mature technology already in production.
- High density, good endurance, CMOS-compatible.
- Used for embedded memory and in-memory computing.
8.2. Multi-Level Granular MTJ
- Novel structure using granular nanostructures.
- Near-continuous states without special lithography.
- Enables analog synaptic weights for neuromorphic computing.
8.3. Spin-Orbit Torque (SOT) Devices
- 3.
- Three-terminal configuration: separate read and write paths.
- 4.
- Faster writing, lower power, but larger area.
- 5.
- Can also be adapted for multi-level operation.
8.4. Domain-Wall Devices
- Use motion of magnetic domain walls along a track.
- Multiple states by positioning the wall.
- Require special geometry (e.g., notches, curved tracks).
8.5. Commercial Status: What Exists Today (Binary vs. Multi-Level)
9. Summary: What a Spintronic Crossbar Can Do
| Capability | Description |
| In-memory computing | Compute directly where data is stored, eliminating von Neumann bottleneck. [2,8,9] |
| Parallel operation | All rows and columns active simultaneously. |
| Matrix-vector multiplication | in nanoseconds. |
| Binary or analog | Single-level (binary) or multi-level (continuous) weights. |
| Non-volatile | States retained without power. |
| Reconfigurable | Program matrix for different functions. |
10. Current Limitations and Recent Advances
10.1. Temperature Sensitivity
10.2. Manufacturing Variability and Materials Control
10.3. Endurance, Retention, and Read Disturb
10.4. Sneak Paths and Selector/Access Devices
10.5. IR Drop, Parasitics, Noise, and Crossbar Scaling
10.6. Recent Advances: Why Stability Has Improved
- Multi-level repeatability: granular MTJ approaches combined with program-and-verify can achieve tighter level distributions (multi-bit ‘synapses’), improving practical analog operation. [1]
11. Conclusions
Acronym
| Acronym | Meaning |
| ADC | Analog-to-Digital Converter |
| IMC | In-Memory Computing |
| IR drop | Voltage drop caused by line resistance |
| KCL | Kirchhoff's Current Law |
| MRAM | Magnetoresistive Random-Access Memory |
| MTJ | Magnetic Tunnel Junction |
| MVM | Matrix-Vector Multiplication |
| RRAM | Resistive Random-Access Memory |
| TIA | Transimpedance Amplifier |
| TMR | Tunnel Magnetoresistance |
Acknowledgments
Conflicts of Interest
Appendix A. Optional Example: Crossbar-Style Computation Inside an MPPT Control Loop

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