Authentic and Fast Thermal Resistance Distribution Analysis in High Power VCSEL Array Module

2. Materials and Methods

2.1. Materials Introduction

The 808nm, 6 mm×6 mm, AlGaAs/GaAs top-emitting VCSEL array chip’s main schematic is shown in Figure 1a. The VCSEL array chip is mainly made of P contact electrode layer, P-type distributed Bragg reflector (DBR), oxide aperture, active region, N-type DBR, GaAs substrate, and N contact electrode layer, and so on. The schematic of the VCSEL array module with remote cooling packaging style is shown in Figure 1b.

The module consists of the single VCSEL array chip, the special solder layer 1, the aluminum nitride heat sink submount, the special solder layer 2, and the water cooled heat sink. The packaging form is usually defined as the remote cooling, which is widely used for high-power VCSEL array modules for a long time. Here, the chip with thousands of luminous points is thined to no more than 100μm and then metallized. Nano silver sintering is used between the VCSEL array chip and the submount to ensure no void inside the whole solder layer, which is extremely important. Because the void will cause excessive thermal resistance, which will result in local burning of the VCSEL array. The thickness of the solder layer 1 is merely less than 5μm which is achieved under the process, 20Mpa, 200℃, 90min. At the same time, the solder layer’s thermal conductivity can reach up to 200W/m•K, which is a satisfactory thermal interface. The submount is made of aluminum nitride material which owns thermal expansion coefficient which is similar to gallium arsenide to relieve packaging stress. Double side welding method with indium is used to connect submount and water cooling heat sink. On the one hand, the method is used to reduce voids in the solder layer 2. On the other hand, it also alleviate packaging stress for that indium is so soft which is usually as suitable solder for laser module. The thickness of the solder 2 is about 10μm. The water-cooled heat sink is made of purple copper, which is processed by wire electrical discharge machining to form multi-channel array. By that, we can enhance the ability of convective heat transfer with water or other coolants to dissipate the heat of the module. The channel width of the water cooling heat sink is about 300μm, and the ratio of channel width to wall thickness is about 1:1 in this water-cooled heat sink.

The threshold current of the chip is about 5A. The power/ current/ voltage (PIV) chart is shown in Figure 2, when the module was in continuous wave operation on a water-cooled heat sink, the water temperature was set at around 20℃ and the water flow rate was set at 25L/min to maintain the flow state in turbulence.

The laser power tester was used for laser power detection which is based on the principle of thermo-electric conversion. When the current was set at about 27A, the laser power of the module reached the peak power of about 85W. Then, the output laser power of the module began to decrease due to insufficient heat dissipation of the remote cooling module. To more intuitively reflect the thermal resistance effect of the module, the power conversion efficiency (PCE) curve is shown in Figure 3.

The maximum electro-optic conversion efficiency approached 40% of the module occurs at a loading currents of about 9A~15A. Thereafter, the efficiency started to rapidly decay as the current was gradually loading. As mentioned above, the thermal resistance effect severely limits the electro-optic conversion efficiency of the module. Therefore, detailed thermal resistance analysis of the VCSEL array module is extremely meaningful.

The thermal resistance is a key indicator of thermal performance in semiconductor lasers. The JEDEC standard No.51-1 defines it as [18]:

$${\mathrm{R}}_{\mathrm{t}\mathrm{h}}={\displaystyle \frac{∆\mathrm{T}}{{\mathrm{P}}_{\mathrm{t}}}}={\displaystyle \frac{{\mathrm{T}}_{\mathrm{j}}-{\mathrm{T}}_{\mathrm{a}}}{{\mathrm{P}}_{\mathrm{t}}}}$$

(1)

In this equation(1),${\mathrm{P}}_{\mathrm{t}}$refers to the heat dissipation power, ${\mathrm{T}}_{\mathrm{j}}$ refers to the junction temperature of the chip,${\mathrm{T}}_{\mathrm{a}}$ refers to the ambient temperature. When the VCSEL array is loaded with input current, heat will generate inside the chip and packaging structure, which contains joule heating, scattering absorption, spontaneous emission, carrier leakage, band alignment, and so on. Once the loading current exceeds the threshold current (${\mathrm{I}}_{\mathrm{t}h}$), the VCSEL array chip will emit laser.

2.2. Structural Function Method

The structural function method for measuring thermal resistance refers to utilizing the linear relationship between the voltage and the temperature of the semiconductor junction. During the heating or cooling process of the semiconductor laser, the transient temperature curve can be obtained by rapidly measuring the junction voltage of the device. With the thermal RC network analysis theory, the transient temperature response curve is analyzed into a thermal RC network, and then transformed into a differential structure function curve by mathematical processing. Thus, a detailed analysis for the thermal resistance of each layer in the device packaging can be well done [19]. Semiconductor devices are generally packaged into multi-layer structures composed of different materials [20]. Within the thermal conduction path of a device, different materials exhibit varying thermal resistances and thermal capacities, leading to distinct temperature responses. Therefore, semiconductor devices and their packaging structures can be regarded as one-dimensional thermal networks. At t=0, we apply heat power to the device, and then the junction voltage of the device is measured to obtain the curve of temperature variation with time during the temperature rise process, which is called the transient response curve. The curve can be equivalent to the response of a Foster RC network model with n units. The response can be expressed as a linear combination of exponential terms with n different time constants:

$$\mathrm{a}\left(t\right)=\sum _{\mathrm{i}=1}^{\mathrm{n}}{\mathrm{R}}_{\mathrm{i}}\left[1-\mathrm{e}\mathrm{x}\mathrm{p}(-\mathrm{t}/{\mathsf{\tau }}_{\mathrm{i}})\right]$$

(2)

In the formula (2), $\mathrm{a}\left(t\right)$ represents the thermal response curve,${\tau }_i$=$R_i$×$C_i$ is the time constant of the No_i RC,${ R}_i$ refers to the amplitude coefficient of the exponential term, the time constant spectrum. Real thermal systems exhibit a continuous distribution of time constants expressed in integral form:

$$\mathrm{a}\left(t\right)=\underset{-\infty }{\overset{\infty }{\int }}R( )\left\{1-exp\left[-{\displaystyle \frac{t}{exp( )}}\right]\right\}d\mathrm{}\mathrm{}$$

(3)

$$\mathrm{a}\left(t\right)=\underset{-\infty }{\overset{\infty }{\int }}R( )\left\{1-exp\left[-exp(z- )\right]\right\}d$$

(4)

Introducing the exponential time variable z=ln t, $\mathrm{a}\left(\mathrm{t}\right)$ is expressed as:

For the spectrum of unknown time constants $R( )$, formula (4) is a devolution type differential equation. Taking the derivative of both sides with respect to z, we obtain:

$${\displaystyle \frac{\mathrm{d}}{\mathrm{d}\mathrm{z}}}\mathrm{a}\left(\mathrm{z}\right)=\mathrm{R}\left(\mathrm{z}\right)\otimes \mathrm{W}\left(\mathrm{z}\right)$$

(5)

In the formula (5), W(z)=exp$\left[z-exp\left(z\right)\right]$,$\otimes$represents convolution operation. Therefore, after measuring the thermal response curve, it is transformed into an exponential time variable form. Take the derivative of it, then, by performing a deconvolution operation based on equation (5), we can obtain the time constant spectrum of the one-dimensional thermal structure $\mathrm{R}\left(\mathrm{z}\right)$. So, the thermal resistance R_i and thermal capacity C_i in the Foster network can be extracted. In fact, the point-to- point heat capacity in the Foster network has no practical physical significance. Therefore, it is necessary to transform the Foster network into the Cauer network with point to ground thermal capacity model. The N pieces RC units obtained from the Cauer network can be used to approximately describe the heat transfer structures of the device. The thermal response curve of the junction temperature is determined by the structural function of the device. In addition, the structural function is defined as the ratio of heat capacity per unit length to thermal resistance per unit length, that is:

$$\mathrm{k}\left(x\right)={\displaystyle \frac{c\left(x\right)}{r\left(x\right)}}$$

(6)

In the formula, x is the linearity of the one-dimensional thermal conduction path.

Along the heat transfer path, we sum up the thermal resistance and heat capacity of each RC unit to get R$\mathsf{\Sigma }$(x) and C$\mathsf{\Sigma }$(x). By comparing with them,the distribution of the structural function along the thermal conduction path x can be obtained. In fact, the commonly used structure in thermal resistance test instruments is the differential structure function, which is the function value obtained by differentiating C$\mathsf{\Sigma }$(x) with respect to R$\mathsf{\Sigma }$(x):

$$K\left[\mathrm{R}\mathsf{\Sigma }\right(\mathrm{x}\left)\right]={\displaystyle \frac{d\mathrm{C}\mathsf{\Sigma }\left(\mathrm{x}\right)}{d\mathrm{R}\mathsf{\Sigma }\left(\mathrm{x}\right)}}$$

(7)

Considering a thin material with a cross-sectional area of A and a thickness of dx. Its heat capacity can be represented as dC$\mathsf{\Sigma }$=c$\mathrm{v}$Adx. The thermal resistance can be represented as dR$\mathsf{\Sigma }$=dx/eA. In the formula, c$\mathrm{v}$ is the volumetric heat capacity. e is the thermal conductivity of the material. Therefore, the differential structure function of equation (7) can be expressed as:

$$K\left[\mathrm{R}\mathsf{\Sigma }\left(\mathrm{x}\right)\right]={\displaystyle \frac{d\mathrm{C}\mathsf{\Sigma }\left(\mathrm{x}\right)}{d\mathrm{R}\mathsf{\Sigma }\left(\mathrm{x}\right)}}={\displaystyle \frac{C\mathrm{v}Adx}{dx/eA}} \mathrm{c}\mathrm{v}\mathrm{e}{\mathrm{A}}^2$$

(8)

For a certain structure along the heat flow path, both c$\mathrm{v}$ and e are constants, while the heat flow cross-sectional area A gradually increases due to thermal diffusion effects. There are local peaks or troughs on the curve of the differential structure function. This is caused by the sudden changes in c$\mathrm{v}$ and e, indicating that the heat flow has reached a new material. Therefore, by analyzing the curve of the differential structure function, we can identify and analyze the internal layer structures of the devices and their thermal conductivity characteristics [20].

The temperature rise and the thermal resistance in the VCSEL array are measured by electrical transient measurement technique. The electrical method is according to the linear relationship between the forward voltage and the junction temperature variation, which is defined as [21]:

$$∆\mathrm{T}={\displaystyle \frac{{∆\mathrm{V}}_{\mathrm{p}\mathrm{n}}}{\mathrm{k}}}$$

(9)

${\mathrm{I}\mathrm{n}\mathrm{t}\mathrm{h}\mathrm{e}\mathrm{a}\mathrm{b}\mathrm{o}\mathrm{v}\mathrm{e}\mathrm{e}\mathrm{q}\mathrm{u}\mathrm{a}\mathrm{t}\mathrm{i}\mathrm{o}\mathrm{n},∆\mathrm{V}}_{\mathrm{p}\mathrm{n}}$is the forward voltage difference of the VCSEL array between before and during operation.$\mathrm{k}$ means a temperature coefficient. We measured the forward voltages at a steady diminutive current of 1mA under various temperatures from 28℃ to 68℃, in 10℃ per step. The current was loaded with Keithley 2400 source meter, which can keep the stability of the testing data. The ambient temperature was regulated and kept by a constant temperature bath, the temperature tolerance can be controlled within ±0.05℃. Then, we obtained a clear linear proportionality constant, which is about -11mV/℃ at the tiny current of 1mA, as shown in Figure 4.

The thermal resistance of the module was tested by a thermal resistance tester at working currents from 2A to 8A with IT6722A DC power supply, in 2A per step, which is around the threshold current of 5A of the top-emitting VCSEL array chip. The module was set at a stabilized temperature of about 25℃during the thermal transient measurement with a thermostatic bath, as shown in Figure 5.

The laser power was measured by Newport Laser power tester. In addition, the thermal power was acquired by the equation:

$${\mathrm{P}}_{\mathrm{t}}=\mathrm{I}\times \mathrm{V}-P_o$$

(10)

${\mathrm{P}}_{\mathrm{t}}$ means the thermal power. I means the operating current, V means the operating voltage,${ P}_o$ means the laser power. The VCSEL array was operated at a set current within only 15 seconds, which is enough to keep the device at a steady state. Then, it was quickly switched from just working state to a measurement state to check the forward voltage under a sensor current of only 1 mA. In addition, Due to the fast cooling of the water-cooled module, the cooling time for testing can be completed within merely 10 seconds. The switching process was quick enough within 1μs. With the equation(1) and (9), we can obtain the thermal resistance curve and the transient cooling curve. The transient cooling curve can be switched to a transient temperature rise curve by a mathematical inversion [21,22,23,24]. To get clearer detailed information on the heat conduction process of the module, we analyzed its thermal resistance composition using the transient temperature rise curve with structure function algorithm.

2.3. Spectroscopy Method

The structural function method has considerable advantages in detecting the composition of the module thermal resistance. However, the method has a deficiency in accurately detecting the thermal resistance of the overall water cooling laser module. In this regard, the spectroscopy method is more suitable. GaAs semiconductor lasers are made of direct band gap materials: the junction temperature changes linearly with laser wavelength, which is defined as [25]:

$$∆\mathrm{T}={\displaystyle \frac{∆\mathsf{\lambda }}{\mathsf{\lambda }\left(\mathrm{T}\right)}}$$

(11)

In the above equation, $∆$T means the junction temperature variation of the laser chip. $∆$λ means wavelength variation. λ(T) means temperature drift coefficient. Firstly, we obtained the temperature drift coefficient by observing the variation of pulse laser wavelength under 5A, 100μs, 100Hz with a stable junction temperature by gradually changing environmental temperature. The ambient temperature was adjusted and controlled by a thermostatic bath instrument shown in Figure 6.

We applied Avantes spectrometer to monitor laser wavelength. Due to the high power of the laser, we used the laser reflection method with a mental plate above to reduce overly intense laser spectral intensity for detection to avoid damaging the instrument. When the temperature was set at constant 25℃, the spectral distribution test is shown in Figure 7, the center wavelength at the low duty cycle is approximately 802.60nm, which is commonly known as cold temperature wavelength. As depicted in Figure 8, the temperature drift coefficient is about 0.056nm/K.

Then, we employed the wavelength drift method to monitor the laser wavelength variation with various operating currents, thereby inferring the junction temperature rise with thermal power, and subsequently calculating the total thermal resistance of the device. To get convenient detection and calculation for the thermal resistance of the laser module, equation (1) can be transformed into the following form [26]:

$${\mathrm{R}}_{\mathrm{t}\mathrm{h}}={\displaystyle \frac{△\mathrm{T}}{△{\mathrm{P}}_{\mathrm{t}}}} ={\displaystyle \frac{△\mathrm{T}}{△\mathsf{\lambda }}}{\displaystyle \frac{△\mathsf{\lambda }}{△{\mathrm{P}}_{\mathrm{t}}}}$$

(12)

In the above equation, ${\mathrm{R}}_{\mathrm{t}\mathrm{h}}$ is the thermal resistance.${\mathrm{P}}_{\mathrm{t}}$ means the thermal power. We tested the voltage, the laser power, and the wavelength of the VCSEL array module at several different loading currents: 5A~35A, at continuous working condition. These test parameter data are shown in Table 1:

3. Results and Discussion

3.1. The Thermal Resistance Analysis by Structure Function Method

Figure 9 shows the differential structure function of the VCSEL array module at loading current 8 A, and the total thermal resistance of the module is nearly 0.45 K/W. There are four peaks, which respectively correspond to the thermal resistance of the VCSEL array chip, R_chip, the solder layer 1, R_solder1, the aluminum nitride submount, R_submount, the solder layer 2, R_solder2, and the resistance of the cooling module, R_cooling.

By the differential structure function, we found that every part’s segmented thermal resistance corresponds to the device composition and the thermal resistances are dominated by packaging design. The encapsulation thermal resistances together account for over 70% of the total thermal resistance of the module. The thermal resistance distribution of the module at loading current of 8 A is shown in Figure 10.

Figure 11 similarly shows the cumulative structure function analysis of the VCSEL array module at the same loading current 8 A. This form also plainly presents the thermal resistances accumulation of the module from another perspective. The above analysis facilitates us to carry out the task of reducing thermal resistance with a clear objective.

Methods such as wafer bonding may be an effective approach for reducing interface thermal resistance between the chip and the submount. Furthermore, directly forming the embedded microchannel inside the submount for the module will also effectively reduce the thermal resistances from R_submount, R_solder2, and R_cooling. By the above improvements and efforts, even with a high thermal power density as high as hundreds of kilowatts per square centimeter, the junction temperature of high-power laser chips will be ultimately reduced by our continuous efforts.

3.2. The Thermal Resistance Analysis by Spectroscopy Method

On the other hand, by the data from the differential structure function, we are not able to obtain accurate thermal resistance values about water-cooled heat sink and also the total thermal resistance of the module. Furthermore, in this research, the thermal resistance tester using the structure function algorithm is limited within 10 A, which can not cover the entire the whole current range from 0 A to 35 A. So, we tried to analyze the overall thermal resistance of the VCSEL array module by the spectroscopy method. By the above data from Table 1, we calculated with the equation 10 and the equation 12. Furthermore, we obtained the function among thermal resistance, thermal power and loading current, as depicted in Figure 12.

As the loading current increases, the thermal power of the laser module rapidly increases. The thermal resistance of the laser module is generally between 0.3 K/W~0.5 K/W and not constant along with the chip’s work status. When the current of 15 A was applied, the lowest thermal resistance of the device is approximately 0.27 K/W. Correspondingly, as depicted in Figure 3, the power conversion efficiency reaches a peak range at nearly the same interval. This may stem from two aspects. Firstly, the chip works best in this range. Secondly, the cooling capacity of the packaging structure can effectively control the temperature of the module within this thermal power range. Afterwards, as the thermal power increases, the heat dissipation level of the cooling module became even less able to meet the heat dissipation requirement. The chip junction temperature begins to continuously rise. Then, the module begins to show thermal rollover. This also highlights the importance of changing the packaging structure and improving the heat dissipation level for the VCSEL array module to reduce its thermal resistance effect.

4. Conclusions

The thermal resistances of the 808nm high-power AlGaAs/GaAs VCSEL array module were respectively investigated by electrical transient measurement and spectroscopy method. The quantitative data about thermal resistances values of the module were measured and quickly obtained within less than 0.5 minute. The structure function algorithm was applied to ascertain the quantitative data of the thermal resistance compositions. The results reveal that the total thermal resistance mainly consists of the solders and the submount, which ultimately causes a significant increase in the junction temperature of the VCSEL array chip. The two methods comprehensively explained the influence of thermal resistance on the VCSEL array module from two perspectives. The total thermal resistance of the module is approximately 0.45 K/W and not constant as the chip’s real time mode. When the loading current is 8 A, the packaging thermal resistance accounts for as high as 70% of the total thermal resistance of the module. R_submount and R_solder2 are the main components which add up to about 54% of the total thermal resistance.

The above quantitative analyses will provide accurate results and constructive suggestions for the unremitting efforts to reduce the thermal resistance of the high-power VCSEL module. So, there is a lot of room for optimization in reducing the thermal resistance of the VCSEL array module. The thermal resistances from the R_submount and the R_solder2 are the foci, which need to be significantly reduced. The solder may be replaced by wafer bonding to significantly reduce the R_solder1. Integrating manifold microchannel cooling within the submount may significantly reduce the thermal resistance of the VCSEL array module.