Submitted:
30 June 2025
Posted:
01 July 2025
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Abstract
Keywords:
1. Introduction
- An arbitrary classical Boolean problem is constructed as a quantum Boolean oracle [8,21]. This constructed oracle can be expressed in arbitrary logical structures, such as Product-Of-Sums (POS) [22,23], Sum-Of-Products (SOP) [22,24], Exclusive-or Sum-Of-Products (ESOP) [25,26], XOR-Satisfiability (CNF-XOR SAT and DNF-XOR SAT) [27,28], Algebraic Normal Form (ANF) (or Reed-Muller expansion) [29,30], just to name a few.
- This constructed oracle (in any logical structure) is converted into its equivalent quantum Boolean oracle in ESOP structure, unless it was initially constructed in ESOP structure.
- The Hamiltonians (HC and HM) of QAOA are then generated from this transformed quantum Phase oracle, based on our modified composition rules originally presented by Hadfield [31].
- The above-mentioned optimization operational concurrencies between a QPU and a minimizer are performed for the generated HC and HM, until finding all optimized approximated solutions. Notice that, in [20], the SciPy optimization minimizer [32] is performed using the constrained optimization by linear approximation (COBYLA) algorithm [14,16,32].
2. Methods
2.1. The Methodology of BHT-QAOA
| Rule 1: | A Feynman (CX) gate is transformed into a Pauli-Z (Z) gate, when Equation (1) stated below is a solution-satisfiable, where j is the index of an input qubit (q). The left side of Equation (1) is the Boolean-based output of a CX gate, and its right side is the phase-inverted output of a Z gate. | |
|
|
(1) | |
| Rule 2: | A Toffoli gate is transformed into a controlled-Z (CZ) gate, when Equation (2) stated below is a solution-satisfiable, where j and k are the indices of input qubits (q). The left side of Equation (2) is the Boolean-based output of a Toffoli gate, and its right side is the phase-inverted output of a CZ gate. | |
|
|
(2) | |
| Rule 3: | An n-bit Toffoli gate is transformed into an (n–1)-bit multi-controlled Z (MCZ) gate, when Equation (3) stated below is a solution-satisfiable, where j is the index of an input qubit (q) and n ≥ 3 qubits (q + fqubit). The left side of Equation (3) is the Boolean-based output of an n-bit Toffoli gate, and its right side is the phase-inverted output of an (n–1)-bit MCZ gate. | |
|
|
(3) | |
2.2. The Architecture of BHT-QAOA
- HC and HM (in a number of p), as the “objective function” needs to be minimized.
- Measured solutions of BHT-QAOA, as the “energy cost” of the objective function.
- Previously calculated ɣ and β, as their “numerical values” need to be optimized.
2.3. The Optimization Approximation Algorithms
3. Results and Discussion
- An arbitrary Boolean problem in POS structure, as stated in Equation (4) and shown in Figure 2a.
- 2.
- An arbitrary Boolean problem in SOP structure, as stated in Equation (5) and illustrated in Figure 2b.
- 3.
- An arbitrary Boolean problem in ESOP structure, as stated in Equation (6) and shown in Figure 2c.
- 4.
- 5.
- A 4-bit conditioned half-adder (HA) digital circuit, which is ORing two 1-bit sums and then ANDing them with one 1-bit carry-out, as stated in Equation (8) and illustrated in Figure 2e,f.
4. Conclusions
Author Contributions
Funding
Institutional Review Board Statement
Data Availability Statement
Conflicts of Interest
References
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| Rules | Gate | Type | g(x) | Hg |
| Rule 1 | Z | Phase |
|
|
| Rule 2 | CZ | Phase |
|
|
| Rule 3 | MCZ | Phase |
|
|
| Rule 4 | X | Phase |
|
Invert signs (±) of all jth qubits in ZQ |
| Applications | BFGS | L-BFGS-B | SLSQP | COBYLA | COBYQA |
| POS | 27 | 21 | 30 | 49 | 38 |
| SOP | 90 | 185 | 181 | 296 | 165 |
| ESOP | 75 | 100 | 108 | 379 | 123 |
| 2×2 Sudoku | 80 | 115 | 61 | 515 | 124 |
| 4-bit HA circuit | 70 | 85 | 71 | 99 | 93 |
| Applications | BFGS | L-BFGS-B | SLSQP | COBYLA | COBYQA |
| POS | 90.1 | 91.1 | 90.7 | 88.3 | 88.0 |
| SOP | 92.4 | 90.0 | 87.7 | 93.7 | 89.9 |
| ESOP | 85.5 | 87.6 | 86.4 | 80.4 | 80.6 |
| 2×2 Sudoku | 71.8 | 69.8 | 71.3 | 68.7 | 71.7 |
| 4-bit HA circuit | 57.3 | 57.7 | 55.9 | 55.5 | 52.1 |
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