Combined Effects of TID Radiation and Electrical Stress on n-MOSFET Current Mirrors

1. Introduction

As semiconductor technology has advanced, integrated circuit (IC) applications revealed a signifying progress and the harsh environment of space has also had a significant impact on device performance. According to statistics performed on satellite failures, a major part is found to be arising from electronic circuits rather than mechanical ones [1,2]. Space radiation poses a significant threat to the reliable operation of electronic circuits, particularly MOS devices. Exposure to radiations can induce single-event (SE) and total-ionizing-dose (TID) effects. While much of the research has focused on SEE effects, there remains a limited body of work addressing the TID mechanisms. An inverter, as a fundamental building block of a MOS circuit [3], is a crucial element to understand the overall system's radiation tolerance. The TID effect is characterized by a cumulative degradation of electronic device performance due to exposure to high-energy rays and charged particles [4,5,6]. It is worth noting that the latter TID mechanism constitutes the main factor limiting the life time of these devices. Opposed to the SEE, the TID effect cannot be completely mitigated. Therefore, a comprehensive analysis of the latter TID effect is essential for assessing the radiation hardness of an integrated circuit. Even at low doses, MOS devices exhibit a higher susceptibility to radiation [7,8,9]. These changes are primarily attributed to the accumulation of positive charges within the oxide layer and the generation of interface traps at the SiO2/Si interface [10,11]. Beyond the immediate impact on device performance, the long-term reliability of devices after exposure to radiation is crucial for ensuring mission success. The device reliability after radiation is important for applications. Knowledge of dependability is also crucial to establish device aging models [12,13,14,15]. Electrical stress exerted on MOS devices can lead to shifts in threshold voltage, degradation in transconductance, and other critical parameter variations [16,17,18,19,20].These changes can have cascading effects, causing failures in both analog and digital circuits. To the subject of biasing, integrated circuits (ICs) require essentially accurate bias voltages and currents for their proper operations [21,22,23]. Traditional CMOS dividers were usually used to realize a suitable biasing. But they again suffer from their dependency on the process technology, supply voltage and temperature [24]. More recently, current mirrors (CMs) have been conceived as new building devices to attain an appropriate biasing. Also, the CMs can amplify or attenuate a current from one location to another in an analog IC

[25,26]. Hence, an efficient design of a CM is mainly to achieve better performance parameters such as current gain, input-output impedances and power consumption.

The present work is aimed to investigate the combined effects of electrical stress and TID on the electrical aging of CMs based on n-MOSFETs. The paper is organized as follows: Section I is dedicated to a brief introduction and related works; Section II presents the electrical aging model for n-MOSFET structures; Section III describes the reliability analyses of TID effects on n-MOSFET current mirrors; Section IV summarizes conclusions and prospects.

2. Electrical Aging Model for n-MOSFETS Structrues

2.1. Hole Trapping

Due to ionizing radiation, the charge build-up into the oxide layer arises from the generation of electron-hole pairs and a subsequent hole trapping. This supposes that de-trapping of holes is neglected. Another simplifying hypothesis can also be adopted. It consists in assuming that the distribution of hole traps is uniform. Which leads to set up the rate equations that govern the trapping of holes as follows :

$${\displaystyle \frac{\partial {\mathit{p}}_{\mathit{T}\mathit{r}\mathit{a}\mathit{p}\mathit{p}\mathit{e}\mathit{d}}(\mathit{x},\mathit{t})}{\partial \mathit{t}}}={\displaystyle \frac{\mathbf{d}\mathsf{\gamma }}{\mathit{d}\mathit{t}}}-\mathit{v}{\displaystyle \frac{\partial {\mathit{p}}_{\mathit{F}\mathit{r}\mathit{e}\mathit{e}}(\mathit{x},\mathit{t})}{\partial \mathit{x}}}$$

(1)

$${\displaystyle \frac{\partial {\mathbf{p}}_{\mathbf{T}\mathbf{r}\mathbf{a}\mathbf{p}\mathbf{p}\mathbf{e}\mathbf{d}}(\mathbf{x},\mathbf{t})}{\partial \mathbf{t}}}=\mathsf{\sigma }\mathbf{v}{\mathbf{p}}_{\mathbf{F}\mathbf{r}\mathbf{e}\mathbf{e}}(\mathbf{x},\mathbf{t})[{\mathbf{N}}_{\mathbf{T}}-{\mathbf{p}}_{\mathbf{T}\mathbf{r}\mathbf{a}\mathbf{p}\mathbf{p}\mathbf{e}\mathbf{d}}\left(\mathbf{x},\mathbf{t}\right)]$$

(2)

where ɣ denotes the rate of generation of electron-hole pairs per unit volume, v is the velocity of holes, σ defines the capture cross-section of the trap sites and N_Tis the density of hole traps throughout the oxide layer. Under this form, it is worth noting that Eqs (1) and (2) can be solved exactly only when the term ɣ is not accounted for. An illustration is given in the report of Ning [27].Later, the charge build-up in MOS structures has been undertaken by Viswanathan [28]. Most interesting, the rate equations were solved for ɣ non null, but in two limiting cases:

i- the density of trapped holes is not large enough compared to the total number of hole traps.

ii- the trapping efficiency is much less lower than the rate of electron-hole generation. The solutions thus adopted in the last case can be combined under a general form:

$${\mathbf{P}}_{\mathbf{T}\mathbf{r}\mathbf{a}\mathbf{p}\mathbf{p}\mathbf{e}\mathbf{d}\mathbf{h}\mathbf{o}\mathbf{l}\mathbf{e}\mathbf{s}}\left(\mathbf{x},\mathbf{t}\right)=\mathbf{N}(1-{\mathbf{e}}^{-{\displaystyle \frac{\mathbf{x}}{\mathsf{\lambda }}}})$$

(3)

with { N= ɣ ;$\mathsf{\lambda }$ =${\displaystyle \frac{1}{{\mathit{N}}_{\mathit{T}}}}$} in the first limiting case and { N=${\mathbf{N}}_{\mathbf{T}}$;$\mathsf{\lambda }$=${\displaystyle \frac{1}{\mathsf{\sigma }\mathbf{ɣ}}}$ }in the second one.

The origin of the x-axis is fixed at the gate-dioxide interface. As has been found, the density of trapped holes shows an exponential amount with a saturated trend going towards the silicon-dioxide interface. In Eq.(3) ,$\mathsf{\lambda }$ can be interpreted as the probability per unit length of a hole to being trapped within the oxide layer under irradiation.

2.2. Time-Dependent Hole Trap Density and Transconductance

Because of hole trapping, a potential shift can occur at the oxide terminal and whose expression versus trapped holes p(x,t) is given by :

$${∆\mathbf{V}}_{\mathbf{F}\mathbf{B}}\left({\mathbf{t}}_{\mathbf{o}\mathbf{x}},\mathsf{\lambda }\right)=-{\displaystyle \frac{\mathbf{q}}{{\mathsf{\epsilon }}_0{\mathsf{\epsilon }}_{\mathbf{r}\mathbf{o}\mathbf{x}}}}{\int }_0^{{\mathbf{t}}_{\mathbf{o}\mathbf{x}}}\mathbf{x}{\mathbf{P}}_{\mathbf{T}\mathbf{r}\mathbf{a}\mathbf{p}\mathbf{p}\mathbf{e}\mathbf{d}}\left(\mathbf{x},\mathbf{t}\right)\mathbf{d}\mathbf{x}$$

(4)

where q is the electronic charge,${\mathrm{Ɛ}}_{rox}$ represents the dielectric constant of the oxide layer,${\mathrm{Ɛ}}_0$ is the permittivity of free space, t_ox is the oxide thickness and FB is a subscript meaning flat band. In evaluating the integral as a function of t_ox, the mean trapping free length is treated as a parameter. Calculation of${∆F}_{FB}(t_{ox},\mathsf{\lambda })$ under a positive bias voltage leads to the following expression:

$${∆\mathit{V}}_{\mathit{F}\mathit{B}}\left({\mathit{t}}_{\mathit{o}\mathit{x}},\mathsf{\lambda }\right)=-{\displaystyle \frac{\mathit{q}\mathit{N}{\mathit{t}}_{\mathit{o}\mathit{x}}^2}{{\mathit{Ɛ}}_{0{\mathit{Ɛ}}_{\mathit{r}\mathit{o}\mathit{x}}}}}\mathbf{F}({\displaystyle \frac{{\mathit{t}}_{\mathit{o}\mathit{x}}}{\mathsf{\lambda }}})$$

(5)

with:

$$\mathbf{F}\left({\displaystyle \frac{{\mathit{t}}_{\mathit{o}\mathit{x}}}{\mathsf{\lambda }}}\right)={\displaystyle \frac{1}{2}}+{\displaystyle \frac{(\frac{{\mathit{t}}_{\mathit{o}\mathit{x}}}{\mathsf{\lambda }}+1)}{\frac{{\mathit{t}}_{\mathit{o}\mathit{x}}^2}{{\mathsf{\lambda }}^2}}}{\mathit{e}}^{-{\displaystyle \frac{{\mathit{t}}_{\mathit{o}\mathit{x}}}{\mathit{ʎ}}}}-{\displaystyle \frac{1}{\frac{{\mathit{t}}_{\mathit{o}\mathit{x}}^2}{{\mathsf{\lambda }}^2}}}$$

For a fixed thickness of the oxide layer and taking the mean trapping free length λ less low than ${\mathrm{t}}_{\mathrm{o}\mathrm{x}}$ ,the pre-exponential factor N will correspond to the hole trap density N_T. On the other hand, by identifying Δ${\mathrm{V}}_{\mathrm{F}\mathrm{B}}$ to the threshold potential shift ΔV_th (TID) as measured under irradiation, we can derive the TID-dependent oxide trapped charge density from the relation:

$${\mathbf{N}}_{\mathbf{T}}\left(\mathbf{T}\mathbf{I}\mathbf{D}\right)={\displaystyle \frac{{\mathbf{Ɛ}}_0{\mathbf{Ɛ}}_{\mathbf{r}\mathbf{o}\mathbf{x}}}{\mathbf{q}{\mathbf{t}}_{\mathbf{o}\mathbf{x}}^2\mathbf{F}(\frac{{\mathbf{t}}_{\mathbf{o}\mathbf{x}}}{\mathsf{\lambda }})}}{∆\mathbf{V}}_{\mathbf{t}\mathbf{h}}(\mathbf{T}\mathbf{I}\mathbf{D})$$

(6)

To further improve the trapping charge model, it is required to assume the existence of an additional sheet charge near the Si /Si${\mathit{O}}_2$ interface,related to surface states or arising from shallow traps .To account for the contribution of all these charge states can be approximately made by defining an effective density of hole traps as:${\mathbf{N}}_{\mathbf{T}}^{\mathbf{E}\mathbf{F}\mathbf{F}}=(1+\mathsf{\alpha }){\mathbf{N}}_{\mathbf{T}}$ where $\alpha$ represents a centesimal percent factor being negative if the additional sheet charge is predominated by electron-traps or positive in the reverse case. Here, this correction is not taken into account.

A deal of interest would also be paid to the transconductance parameter. Let ${\mathrm{V}}_{\mathrm{G}\mathrm{S}}\left(\mathrm{t},\mathrm{T}\mathrm{I}\mathrm{D}\right)={\mathrm{V}}_{\mathrm{G}\mathrm{S}}\left(\mathrm{t},\mathrm{T}\mathrm{I}\mathrm{D}=0\right)+{∆\mathrm{V}}_{\mathrm{F}\mathrm{B}}(\mathrm{t},\mathrm{T}\mathrm{I}\mathrm{D})$ be the gate-to-source bias voltage under gamma radiation. Similarly, to the hole trap density, the time-dependent transconductance is taken under the form:

$${\mathbf{g}}_{\mathbf{m}}\left(\mathbf{T}\mathbf{I}\mathbf{D}\right)={\displaystyle \frac{{\mathbf{g}}_{\mathbf{m}}(\mathbf{T}\mathbf{I}\mathbf{D}=0)}{1-\mathbf{ɳ}[\frac{\mathbf{q}{\mathbf{t}}_{\mathbf{o}\mathbf{x}}^2}{{\mathbf{Ɛ}}_0{\mathbf{Ɛ}}_{\mathbf{r}\mathbf{o}\mathbf{x}}}\mathbf{F}(\frac{{\mathbf{t}}_{\mathbf{o}\mathbf{x}}}{\mathsf{\lambda }})]{\mathbf{N}}_{\mathbf{T}(\mathbf{T}\mathbf{I}\mathbf{D})}}}$$

(7)

where ɳ is an empirical factor and g_m (TID=0) is the initial transconductance before irradiation. Note, that ɳ can be determined from measured g_m (TID) and calculated N_T(TID) using the relation:

$$\mathbf{ɳ}={\displaystyle \frac{1-\frac{{\mathbf{g}}_{\mathbf{m}}(\mathbf{T}\mathbf{I}\mathbf{D}=0)}{{\mathbf{g}}_{\mathbf{m}}(\mathbf{T}\mathbf{I}\mathbf{D})}}{\frac{\mathbf{q}{\mathbf{t}}_{\mathbf{o}\mathbf{x}}^2}{{\mathbf{Ɛ}}_0{\mathbf{Ɛ}}_{\mathbf{r}\mathbf{o}\mathbf{x}}}\mathbf{F}(\frac{{\mathbf{t}}_{\mathbf{o}\mathbf{x}}}{\mathsf{\lambda }}){\mathbf{N}}_{\mathbf{T}(\mathbf{T}\mathbf{I}\mathbf{D})}}}$$

(8)

3. Reliabilityanalyses of Total Ionizing Dose Effects ON n-MOSFET Current Mirrors

3.1. Electrical Aging Behavioral of an n-MOSFET

The n-MOSFET under investigation has been fabricated using 1 µm channel technology. The thickness of oxide layer is fixed at t_ox=25 nm . More details on the epitaxial growth and the annealing process are available in Ref [29].

Concerning V_GS-I_DS characteristics, measurements were performed before and after irradiation for V_DS fixed at 50 mV in the linear regime and V_DS=3V in the saturation regime. As it is seen, the threshold potential shows a negative shift with increased TID and the relevant data are found to be fitted by the polynomial law:

$${\mathsf{\Delta }\mathbf{V}}_{\mathbf{T}\mathbf{h}}=1.69-124{10}^{-5}\times \mathbf{T}\mathbf{I}\mathbf{D}$$

(9)

where V_th (TID=0)=1.69Volt.From measured ΔV_th(TID),we have deduced the density N_T of induced hole traps as a function of TID using Eq(6). The mean trapping free length is fixed at $\mathsf{\lambda }$ =5nm which corresponds to ${\mathbf{e}}^{-{\displaystyle \frac{{\mathbf{t}}_{\mathbf{o}\mathbf{x}}}{\mathsf{\lambda }}}}=6.{10}^{-3}$. Results are depicted in Fig.1, on an interfacial charge plot ${\mathbf{N}}_{\mathbf{T}}^{2\mathbf{D}}={\mathbf{N}}_{\mathbf{T}}\times {\mathbf{t}}_{\mathbf{o}\mathbf{x}}$.It clearly appears that the trapping of holes shows a gradual amount as the total ionizing dose increases. As has also been provided, the interfacial density of hole traps is related to TID by the fitting relation :

$${\mathbf{N}}_{\mathbf{T}}^{2\mathbf{D}}({10}^{11}{\mathbf{c}\mathbf{m}}^{-2})=-356\times {10}^{-5}+238\times {10}^{-5}\times \mathbf{T}\mathbf{I}\mathbf{D}-1.78\times {10}^{-7}\times {\mathbf{T}\mathbf{I}\mathbf{D}}^2\mathrm{in}{\mathrm{cm}}^{-2}$$

(10)

In addition to N_T, the graph shows the corresponding threshold potential versus TID.As a proposal of explanation, exposure to relatively high TID levels induces defects in the MOS capacitance. Which can make it difficult for electrons to flow into the conductive channel. Microscopically, an accumulation of holes reduces switching speed of the MOSFET. As a peculiar feature, the threshold potential shift is found to be more significant at lower TID doses. Additionally, an increase in the threshold voltage can enhance the power consumption. Another fundamental parameter of the n-MOSFET that is impacted by gamma radiation consists in then transconductance. Measurements of this parameter have led to an increasing trend versus TID. The data points are depicted in Fig.2 with the obtained fitting:

$${\mathbf{g}}_{\mathbf{m}}\left(\mathbf{T}\mathbf{I}\mathbf{D}\right)=1.11+1.02{10}^{-3}\times \mathbf{T}\mathbf{I}\mathbf{D}\mathrm{in}\mathbf{\mu }\mathbf{S}$$

(11)

From measured g_m (TID) and N_T (TID),we have computed the empirical factor ɳ (TID).Results are found to be fitted by:

$$\mathbf{ɳ}\left({10}^{15}{\mathbf{m}}^{-2}\right)=-0.042-3.35\times {10}^{-5}\times \mathbf{T}\mathbf{I}\mathbf{D}+7\times {10}^{-7}\times {\mathbf{T}\mathbf{I}\mathbf{D}}^2-1.45\times {10}^{-9}\times {\mathbf{T}\mathbf{I}\mathbf{D}}^3$$

(12)

For the conductance, however, how we did make in relating this parameter to the charge built-up into the oxide. Calculation has been made using TID as an auxiliary variable, which has led to the plot of Fig.3. As can be noticed, the conductance increases with TID according to the fitting:

$${\mathbf{g}}_{\mathbf{d}}\left(\mathbf{T}\mathbf{I}\mathbf{D}\right)=1.16{10}^{-5}+2.83{10}^{-8}\times \mathbf{T}\mathbf{I}\mathbf{D}-171{10}^{-11}\times \mathbf{T}\mathbf{I}\mathbf{D}$$

(13)

3.2. Electrical Degradation Mechanisms in n-MOSFET Current Mirrors

The biasing CM as it used in AMS integrated circuits [29] is shown in Fig.4 with its dynamical equivalent scheme. It is constructed using two n-MOS transistors labelled M1 et M2.The diode-connected transistor M1 operates in saturation regime and converts the reference current I_REF into a corresponding gate-to-source voltage V_GS1. The transistor M2 is a regenerating module that gives rise to an output current I_OUT. If both the transistors M1 and M2 are matched, the gate-to-source biases V_GS1 and V_GS2 are equal and then I_REF would be perfectly at the output of CM. Under saturation conditions, the reference and output currents are given by the set of electrical equations:

$${\mathbf{I}}_{\mathbf{R}\mathbf{E}\mathbf{F}=}{{\displaystyle \frac{1}{2}}{\mathbf{\mu }}_{\mathbf{n}}\mathbf{C}}_{\mathbf{o}\mathbf{x}}({{\displaystyle \frac{\mathbf{w}}{\mathbf{L}}})}_1{\left({\mathbf{V}}_{\mathbf{G}\mathbf{S}1}-{\mathbf{V}}_{\mathbf{T}\mathbf{H}1}\right)}^2$$

(14)

$${\mathbf{I}}_{\mathbf{O}\mathbf{U}\mathbf{T}=}{{\displaystyle \frac{1}{2}}{\mathbf{\mu }}_{\mathbf{n}}\mathbf{C}}_{\mathbf{o}\mathbf{x}}({{\displaystyle \frac{\mathbf{w}}{\mathbf{L}}})}_2{\left({\mathbf{V}}_{\mathbf{G}\mathbf{S}2}-{\mathbf{V}}_{\mathbf{T}\mathbf{H}2}\right)}^2$$

(15)

Figure 4. The basic n-MOSET current mirror circuit SCM.

Figure 4. The basic n-MOSET current mirror circuit SCM.

where µ_n is the electron mobility, C_ox denotes the MOSFET capacitance per unit area and V_THi =1.2 are the threshold potentials of the n-MOSFETs. From I_REF and I_out , we can derive the current gain. It is undoubtedly that this parameter is affected by irradiation. Let TID1=x TID and TID2= (1-x)TID with 0≤ x ≤1 be the total ionizing doses for the MOSFET1and MOSFET2 transistors respectively. The current gain of the SCM reads as:

$${\mathbf{A}}_{\mathbf{i}(\mathbf{x},\mathbf{T}\mathbf{I}\mathbf{D})}^{\mathbf{S}\mathbf{C}\mathbf{M}}={\displaystyle \frac{({\frac{\mathbf{w}}{\mathbf{L}})}_2}{({\frac{\mathbf{w}}{\mathbf{L}})}_1}}\times {\displaystyle \frac{{\mathbf{V}}_{\mathbf{G}\mathbf{S}}-{\mathbf{V}}_{\mathbf{T}\mathbf{H}}\left[\left(1-\mathbf{x}\right)\mathbf{T}\mathbf{I}\mathbf{D}\right]}{{\mathbf{V}}_{\mathbf{G}\mathbf{S}}-{\mathbf{V}}_{\mathbf{T}\mathbf{H}}\left[\mathbf{x}\mathbf{T}\mathbf{I}\mathbf{D}\right]}}$$

(16)

where x represents a dissymmetric percent that characterizes the TID contamination of the n-MOSFETs. Calculation of A_i^SCM(x.TID) has led to a graph of the current gain of an n-MOSCM versus x for different TIDs as illustrated in Fig.5. We note that the current gain is a measure of how much an n-MOSFET mirror can replicate a current signal. The plot also shows that the current gain decreases as TID increases. This is because exposure to ionizing radiations damages the MOSFET’s gate oxide and reduces the ability of the gate to control the flow of current between the source and drain. As a further observation, the decreasing rate in current gain is found to change with the dissymmetric percent. Analytically, the x- and TID- dependent current gain are fitted according to:

$${\mathbf{A}}_{\mathbf{i}}^{\mathbf{S}\mathbf{C}\mathbf{M}}\left(\mathbf{x},\mathbf{T}\mathbf{I}\mathbf{D}\right)={\mathbf{a}}_0+{\mathbf{a}}_1\times \mathbf{T}\mathbf{I}\mathbf{D}+{\mathbf{a}}_2\times {\mathbf{T}\mathbf{I}\mathbf{D}}^2$$

(17)

$${\mathbf{a}}_0\left(\mathbf{x}\right)=1.017+0.00388\times \mathbf{x}+2.14{10}^{-17}\times {\mathbf{x}}^2$$

$${\mathbf{a}}_1\left(\mathbf{x}\right)=-0.024-0.0088\times \mathbf{x}+5{10}^{-6}\times {\mathbf{x}}^2$$

$${\mathbf{a}}_2\left(\mathbf{x}\right)=-0.057+0.00229\times \mathbf{x}+8.35{10}^{-6}\times {\mathbf{x}}^2$$

Usually concerning the dissymmetric percent, it is worth to notice that a relatively high value of this coefficient means that the n-MOSFET gate-oxide becomes more asymmetric. This makes it sufficiently susceptible to submit damages from ionizing radiation. Two other important parameters were dialed with an interest. They consist in input and output impedances of the SCM. According to that TD1 and TD2 were defined above, both impedances read under the forms:

$${\mathbf{R}}_{\mathbf{i}\mathbf{n}}^{\mathbf{S}\mathbf{C}\mathbf{M}}\left(\mathbf{x},\mathbf{T}\mathbf{I}\mathbf{D}\right)={\displaystyle \frac{1}{{\mathbf{g}}_{\mathbf{m}\left[\mathbf{x}\mathbf{T}\mathbf{I}\mathbf{D}\right]}}}$$

(18)

$${\mathbf{R}}_{\mathbf{o}\mathbf{u}\mathbf{t}}^{\mathbf{S}\mathbf{C}\mathbf{M}}\left(\mathbf{x},\mathbf{T}\mathbf{I}\mathbf{D}\right)={\displaystyle \frac{1}{{\mathbf{g}}_{\mathbf{d}[(1-\mathrm{x})\mathrm{T}\mathrm{I}\mathrm{D}]}}}$$

(19)

Using Eq.18 and Eq.19, we have calculated ${\mathrm{R}}_{\mathrm{i}\mathrm{n}}^{\mathrm{S}\mathrm{C}\mathrm{M}}$ and ${\mathrm{R}}_{\mathrm{o}\mathrm{u}\mathrm{t}}^{\mathrm{S}\mathrm{C}\mathrm{M}}$ versus x for different TIDs ranging from 50 Krad to 300 Krad. As can be seen, Fig.6 shows a clear positive correlation between the dissymmetric percent and input impedance, independently on the TID level. Such an increasing in impedance is assigned to the disruption of conduction paths caused by asymmetry. Moreover, the effect of TID is significant, suggesting that defects created by radiation also reinforce the CM resistance at input. The graph of Fig.7, however, shows how the output impedance is affected by the two factors. As it is seen, the impedance at output decreases with increased asymmetry percentage and total ionizing dose. In terms of analytical fitting of ${\mathbf{R}}_{\mathbf{i}\mathbf{n}}^{\mathbf{S}\mathbf{C}\mathbf{M}}(\mathbf{x},\mathbf{T}\mathbf{I}\mathbf{D})$ and ${\mathbf{R}}_{\mathbf{o}\mathbf{u}\mathbf{t}}^{\mathbf{S}\mathbf{C}\mathbf{M}}(\mathbf{x},\mathbf{T}\mathbf{I}\mathbf{D})$, it is provided by the following set of expressions:

$$\begin{gathered} {\mathbf{R}}_{\mathbf{i}\mathbf{n}}^{\mathbf{S}\mathbf{C}\mathbf{M}}\left(\mathbf{x},\mathbf{T}\mathbf{I}\mathbf{D}\right)={\mathbf{a}}_0+{\mathbf{a}}_1\times \mathbf{T}\mathbf{I}\mathbf{D}+{\mathbf{a}}_2\times {\mathbf{T}\mathbf{I}\mathbf{D}}^2 \\ {\mathbf{a}}_0\left(\mathbf{x}\right)=1.11-1.55{10}^{-18}\times \mathbf{x} \\ {\mathbf{a}}_1\left(\mathbf{x}\right)=-7.91{10}^{-4}-0.00157\times \mathbf{x} \\ {\mathbf{a}}_2\left(\mathbf{x}\right)=0.047-6.45{10}^{-4}\times \mathbf{x} \end{gathered}$$

(20)

$$\begin{gathered} {\mathbf{R}}_{\mathbf{o}\mathbf{u}\mathbf{t}}^{\mathbf{S}\mathbf{C}\mathbf{M}}\left(\mathbf{x},\mathbf{T}\mathbf{I}\mathbf{D}\right)={\mathbf{a}}_0+{\mathbf{a}}_1\times \mathbf{T}\mathbf{I}\mathbf{D}+{\mathbf{a}}_2\times {\mathbf{T}\mathbf{I}\mathbf{D}}^2 \\ {\mathbf{a}}_0\left(\mathbf{x}\right)=86295.45-0.63\times \mathbf{x} \\ {\mathbf{a}}_1\left(\mathbf{x}\right)=-1679.69-173.37\times \mathbf{x} \\ {\mathbf{a}}_2\left(\mathbf{x}\right)=-4684.79+83.85\times \mathbf{x} \end{gathered}$$

(21)

In a concluding remark, input and output impedances of a perfect current mirror should be very low and large enough respectively. This suggests that degradations induced by geometric dissymmetry and the effect of ionizing radiation, have a negative impact on CM’ ability to deliver more current to the load. It is then required to characterize these degradations in an attempt to develop an equivalent model that includes the parameter related to a radiation-hardened environment. In practice, SCMs are suitable for low voltage applications. Technologically, the limited usage of SCMs is contributed to their low output impedances. Some remedies were conceived to further improve the impedance at output. They consisted in widlar CM [26] and cascade CM [25,26] designs. As has been found, the output impedance of a SCM is increased due to Widlar and Cascade arrangements with respective ratios.

$${\displaystyle \frac{{\mathbf{R}}_{\mathbf{o}\mathbf{u}\mathbf{t}}^{\mathbf{W}\mathbf{M}\mathbf{C}}}{{\mathbf{R}}_{\mathbf{o}\mathbf{u}\mathbf{t}}^{\mathbf{S}\mathbf{C}\mathbf{M}}}}=1+\mathbf{R}{\mathbf{g}}_{\mathbf{m}2}\mathrm{and}{\displaystyle \frac{{\mathbf{R}}_{\mathbf{o}\mathbf{u}\mathbf{t}}^{\mathbf{C}\mathbf{a}\mathbf{s}\mathbf{c}\mathbf{o}\mathbf{d}\mathbf{e}\mathbf{C}\mathbf{M}}}{{\mathbf{R}}_{\mathbf{o}\mathbf{u}\mathbf{t}}^{\mathbf{S}\mathbf{C}\mathbf{M}}}}={{\mathbf{r}}_{\mathbf{d}\mathbf{s}3}\mathbf{g}}_{\mathbf{m}3}{\mathbf{r}}_{\mathbf{D}\mathbf{S}2}{\mathbf{g}}_{\mathbf{D}\mathbf{S}1}$$

(22)

In closing this subsection, it is worth to mention that the cascade technology can open a promising way to construct electronic applications with low voltage operation and low power consumption. But the use of complexed configurations needs a multitude of elementary transistors. Because of different operating regimes, the cascade CMs could exhibit a mismatching in current and voltage between input and output. Exposure to ionizing radiations would lead to further degradations as well.

4. Conclusions

In this study, we have investigated the combined effects of TID radiation and electrical stress on the performance of current mirrors based on n-MOSFETs. Through experimental measurements and simulations using LTspice, we analyzed both TID radiation and electrical stress independently contribute to a degradation of the current mirror's accuracy, matching, and electrical performance. Our results demonstrate that both TID radiation primarily causing charge trapping in the gate oxide leading to a threshold voltage shift, while electrical stress provokes these effects by a further altering device characteristics such as transconductance and current gain. Consequently, current mirrors subjected to both TID radiation and electrical stress show significant changes in their characteristics, leading to a loss of precision and reliability. The findings highlight the importance of considering both radiation and electrical stress in the design and qualification of n-MOSFET current mirrors for radiation-hardened applications. To mitigate these effects, it is essential to explore design optimizations such as improved radiation-hardened materials, fault-tolerant circuit topologies, and enhanced device shielding techniques. Further research should focus on developing a complete model to predict the combined impact of TID radiation and electrical stress. This undoubtedly allows to design more accurate MOSFET-circuits against high gamma-ray doses.