1. Introduction
Among Wide Bandgap Semiconductors (WBSs), Gallium Nitride (GaN) is emerging as the latest breakthrough in developing novel energy-efficient power electronic devices and optoelectronic components [
1]. It is characterized by a crystallographic arrangement typical of wurtzite, where Gallium (Ga) and Nitrogen (N) atoms are spatially arranged to form a superimposed hexagonal packed lattice. Power electronics has recently leveraged the characteristics of wide bandgap materials to overcome the limitations imposed by silicon. In particular, the increasing demand for the next generation of high-efficiency power converters has pushed up the development of devices capable of operating at higher frequencies and temperatures, achieving higher conversion efficiency. Among these devices, GaN-based technology has been employed to develop AlGaN/GaN high electron mobility transistors (HEMTs) [
2,
3,
4]. These devices find applications in electric vehicles, phone chargers, renewable energies, and more, as they meet the above specifications, are able to operate at high temperatures, frequencies, voltages, and currents, and allow the design of systems that occupy less space and generate less heat [
5]. However, due to the limited commercial availability of bulk-GaN substrates [
6], GaN-based electronics are typically developed using alternative substrates such as sapphire (
), Silicon Carbide (SiC), and silicon (Si) [
7]. Nevertheless, owing to its cost-effectiveness and availability in large wafer sizes (e.g., 12-inch wafers), silicon (Si) substrate is widely used and predominant compared to SiC and
substrates, which are available in smaller-sized wafers (e.g., 6 or 8 inches) [
8]. Moreover, silicon technology and fabrication processes are more mature and advanced. Besides, the presence of an AlGaN (Aluminum Gallium Nitride) modulation layer on silicon substrate plays a crucial role in mitigating defects in GaN semiconductor materials. These factors, along with the higher costs associated with SiC, have positioned silicon as the preferred substrate for electronic industrial production. Although silicon is a dominant choice and more commonly used for electronic applications, it’s worth noting that there are specific applications where SiC or sapphire substrates might be preferred, depending on the performance requirements and specific characteristics of the devices being developed.
The packaging of electronic devices plays a critical role in ensuring their functionality, reliability, and protection from external factors (chemicals, light exposure, and mechanical impact) [
9], while simultaneously guaranteeing a good connection between the chip and the board. For these reasons, many studies have been conducted to identify the best kind of packaging for the desired applications, testing different designs and materials. More specifically, the electronic device packaging research field has become increasingly active as the demand for power devices has increased [
10]. Among all the analyzed factors that can affect both performance and lifetime of a device, the effect of the mechanical stress on the chip surface is rarely taken in account [
11]. Due to the lattice reticular mismatch between the AlGaN/GaN HEMT and the chosen substrate, along with the difference in thermal expansion coefficients [
12], there is a significant built-in strain/stress capable of modifying the overall performance of GaN-based device. Moreover, regardless of the type of used substrate, AlGaN/GaN HEMTs must be encapsulated within specific packaging, typically made up of metal, glass, plastic, or ceramic materials.
The electronic device studied in this work uses a bond-wire-free package designed around the chip to save space and optimize thermal dissipation. This package comprises a lead frame onto which the die is soldered using a silver sinter paste. Fiberglass is used to plane the intermediate space. Holes are then dug into the glass fiber, onto which copper is deposited, and subsequently etched down using a dedicated mask, leaving the final connection. Despite its utility, the packaging encapsulation process may induce unwanted additional mechanical residual stresses across various layers of the device and at the die/packaging interface. The additional mechanical stress can be even more burdensome under normal operating conditions due to differences in thermal expansion coefficients between the various materials composing the device [
13]. The above results in a continuous stream of reliability challenges in the field of advanced packaging technology. This work focus on the effect of packaging on the stress among the semiconductor layers constituting the device. In particular, the thermal mismatch contributes to premature device failure through a variety of mechanisms, including packaging, die, wire, and solder bump crack, as well as delamination. In this context, Micro-Raman spectroscopy emerges as a potent non-contact, local, and non-destructive molecular characterization technique [
14] capable to assess localized residual strain/stress across the entire thickness of the AlGaN/GaN HEMT [
15], with a sub-micron lateral resolution. Significantly, when crystals are subjected to mechanical stress, the frequency of their characteristic Raman modes shifts due to stress-induced crystal deformations [
9]. The GaN crystal Raman spectrum can be populated by eight different optical modes, four of which are Raman active in our geometry, namely A1(TO), E1(TO), E2(low), and E2(high) [
16]. Among the detectable phonon modes, the E2(high), which arises from atomic oscillations along the c-plane, turns out to be more susceptible to lattice strain elongations, constituting a good marker for the quantification of residual stresses in AlGaN/GaN HEMT devices [
17]. According to the previous consideration, the frequency-center (ω) of the E2 (high) mode was monitored along a vertical direction spanning from the bottom to the top of the HEMT devices crossing the entire AlGaN/GaN heterostructures. This comprehensive analysis was conducted for both AlGaN/GaN HEMT-PD and AlGaN/GaN HEMT-B samples. This approach, together with using specific strain/stress relation, enables to correlate the optical data, as achieved by micro-Raman spectroscopy, and the residual stress existing within the layers of the device under test [
1,
7,
18,
19]. Knowledge of the aforementioned aspects not only helps to evaluate the performance of GaN-based electronics for various applications, but also provides valuable information for the understanding of unknown failure mechanisms which compromise their lifetime.
3. Results and Discussion
Figure 4a shows an optical microphotograph of the cross-section of the sample on which the study was conducted. In particular, the 128 spectra were acquired along the red line crossing the figure orthogonally to the layers.
Figure 4b shows the 1D map of the Raman spectra acquired during the experiment along the 10 μm investigated (i.e., the Raman intensities acquired point by point plotted against the Raman shift).
It can roughly be commented that the spectral structures shift when moving from silicon through the layers of GaN, indicating the presence of intrinsic stress. In particular, the GaN Raman peaks in the lower part of the map start to redshift as the position of the area under analysis approaches to the GaN/Si interface. The frequency center of Raman peaks is intimately correlated to the interatomic potential between atoms [
23]. Accordingly, changes in this potential due to intrinsic stress within the crystal, lead to Raman shifts of specific and characteristic vibrational modes of the structure, regardless of its origin [
23].
Figure 5 displays typical micro-Raman spectra acquired at the GaN epitaxy layer (
Figure 5a) and at the GaN/Si interface (
Figure 5b). The micro-Raman profile collected at the GaN epitaxy layer (
Figure 5a) reveals distinct contributions at 531.7
, 558.7
, and 567.7
respectively associated to the A1(TO), E1(TO) and E2(high) modes of the hexagonal structure of wurtzite. At the GaN/Si interface (
Figure 5b), as expected, a characteristic Si Raman peak centered at 521.4
, arising from the Si substrate, is clearly distinguished. Furthermore, the Raman mode deriving from GaN structures, E2(high) at 569.6
, is also observed.
The observed frequency shift of the E2(high) mode, occurring from the GaN epitaxy layer to the GaN/Si interface, can be attributed to the different stress conditions in these two regions.
Since the main purpose of the work is to identify the presence of stress among the layers using Raman spectroscopy, it needs to measure the Raman peak positions with the utmost precision. Despite the rather high spectral resolution of the measurement instrument, obtaining accurate information requires fitting the experimental data using an appropriate model. In particular, the used model consists of 3 Lorentzian lines describing the Raman modes of GaN (A1(TO), E1(TO) and E2(high)), and also takes into account the presence of silicon when it needs. All the 128 spectra were fitted using the model described above to obtain the characteristic frequency ω of the modes point by point along the scanned line. Notably, E2(high) mode was found to be particularly sensitive to biaxial stresses compared to both A1(TO) and E1(TO) modes. For this reason and in agreement with literature, it was used as a marker for quantifying residual stresses [
24]. This may be reasonably due to the nature of the E2(high) mode, characterized by atomic oscillations almost perpendicular to the c-axis of wurtzite, hence more sensitive to stress along the chosen axis (see
Figure 2).
The inset of
Figure 6 shows the trend of the frequency of mode E2(high) in the sample HEMT-B (red line) and HEMT-PD (blue line) when moving along the vertical path represented by the red line in
Figure 4, i.e., crossing the Al-GaN/GaN heterostructure starting from the package side and moving towards the silicon substrate.
The E2(high) ω values allow calculating the residual stress point by point within the AlGaN/GaN HEMT devices. Indeed, the frequency shift (Δω) linearly depends on the residual stress (σ) according to the relationship:
where K represents the stress coefficient, equal to 4.3
/GPa for GaN grown on c-direction silicon [
25]. The frequency shift, Δω, is defined as Δω = ω – ω
0, where ω is the peak frequency-center, and ω
0 accounts for the corresponding stress-free E2(high) peak frequency-center, fixed at 568
[
26].
Figure 6 shows the residual stress σ in GPa, inferred from the frequency shift E2 (high) Δω, as a function of position along the studied path for both HEMT-B devices (red line) and HEMT-PD devices (blue line).
Due to the linear correlation between stress and frequency shift, the E2(high) mode frequency center follows a pattern mirroring that of the stress, as can be deduced by observing the inset of
Figure 6. Analyzing the residual stress trend along the AlGaN/GaN HEMT structure (
Figure 6), it is worth of note that the influence of the package is mainly visible in the range from 5 µm to 6 µm (zone of interest). In the range between 6.55 µm and 7 µm, the lattice mismatch at the GaN/Si interface induces a more pronounced tensile stress compared to that generated by the presence of packaging, as highlighted by the redshift (a shift towards lower frequencies) of the E2 (high) mode. Furthermore, the non-monotonic behavior observed can be attributed to both the characteristics of the multilayer structure and/or the doping of the layer composing the device. The behavior of E2 (high) in HEMT-B (red curve in the graph shown in
Figure 6) shows a slight initial shift towards lower frequency values as it moves through the layers from 5 µm to ~5.5 µm, indicating the presence of tensile stress. This is followed by a clear shift towards the blue in E2 (high), attributed to compression stress likely induced by additional forces or applied loads. Subsequently, near the silicon substrate, a noticeable tensile stress is observed characterized by a frequency shift towards lower frequencies, probably stemming from the lattice mismatch between GaN and silicon. The behavior of the E2 mode in the HEMT-PD device is entirely similar. However, the observed stress values are generally lower across the entire device (blue curve in the graph shown in
Figure 6).
The influence of packaging is evident only within the specified area of interest (from 5 to 6.55 µm) located near the surface of the device. Within this region, the packaged device (HEMT-PD) shows a decrease in stress levels of about 0.1 GPa compared to the bare one (HEMT-B). This stress mitigation is attributed to the compression introduced by the packaging, which compensates for the intrinsic tensile stress present between the layers of the device. This result stems from a proper choice of material and packaging design, which must be optimized in terms of shape, dimensions, and thermal properties. Additionally, the incorporation of intermediate layers or buffer materials with more similar thermal properties contributes to reducing stress at interfaces between different materials and ensures effective stress mitigation across the mold.
The mitigation of stress among the active layers of the device has a direct impact on its reliability and performance. Indeed, thermal-mechanical stresses and deformations are already well-known and extensively studied failure mechanisms. In general, lower stress leads to slower aging of the device. Furthermore, when current flows through a device, it undergoes thermal expansion proportional to the current itself due to the increase in temperature in the active region of the device [
11]. Generally, this deformation is not uniform across the entire device but depends on the shape and arrangement of the semiconductor part through which the current flows. Particularly, in power switching applications, current values can be very high, resulting in intense heat release and consequent mechanical deformation. Since the crystal can withstand defined stress values beyond which it breaks, it is evident that the presence of residual stress when the device is off can limit the maximum current that can flow through the device without destroying it. This aspect, along with more specifically thermal aspects, must be taken into account when defining the mission profile. Considering the above, it is evident that residual stress mitigation is, among all other advantages, a way to improve the device’s performance and increase its lifetime. Therefore, we can conclude that proper packaging design can effectively enhance the quality and overall reliability of the devices.
4. Conclusions
In this article, micro-Raman spectroscopy was successfully employed to assess the stress/deformation induced by packaging in AlGaN/GaN high-electron-mobility transistors (HEMTs) supplied by STMicroelectronics S.r.l. To evaluate the packaging’s impact, we acquired 128 micro-Raman spectra by vertically scanning along the AlGaN/GaN heterostructure of the device. The data were analyzed using a fitting procedure employing a model consisting of three or four Lorentzians to accurately measure the frequency shift of the phonon modes’ center. Attention was focused on the E2 (high) phonon mode, which is highly sensitive to crystalline stress and therefore can be effectively used for its quantification. Two GaN devices supplied by STMicroelectronics S.r.l were studied, one packaged and the other bare, to assess the influence of packaging on the residual stress present among the active layers of the device.
In the HEMT-PD device, a blue shift of the E2 (high) mode near the packaging was observed, while a slight red shift followed by a blue shift was observed for the bare device. A linear correlation between the Raman frequency shift Δω and stress σ was used to evaluate the compression stress induced by packaging. The packaged device shows a decrease in stress levels of about 0.1 GPa compared to the bare HEMT. In conclusion, the study states that the compression stress induced by the packaging process strongly mitigates the residual tensile stress present on wafer-level HEMT-B devices. Therefore, packaging, which provides mechanical support and protection to the sensitive semiconductor wafer from external environmental factors, can play a dual role by also contributing to stress mitigation, compensating for the inherent tensile stress in these devices, and thereby improving performance in terms of reliability, dynamics, and lifetime.