Article
Version 1
Preserved in Portico This version is not peer-reviewed
Linearization Technique of Low Power Opamps in CMOS FD-SOI Technologies
Version 1
: Received: 14 June 2021 / Approved: 16 June 2021 / Online: 16 June 2021 (10:20:52 CEST)
A peer-reviewed article of this Preprint also exists.
Kuzmicz, W. Linearization Technique of Low Power Opamps in CMOS FD-SOI Technologies. Electronics 2021, 10, 1800. Kuzmicz, W. Linearization Technique of Low Power Opamps in CMOS FD-SOI Technologies. Electronics 2021, 10, 1800.
Abstract
Negative feedback to the back gate of MOS devices available in FD-SOI technologies can be used to improve linearity of operational amplifiers. Two operational amplifiers designed and fabricated in a 22nm FD-SOI technology illustrate this technique, its advantages and limitations.
Keywords
CMOS analog integrated circuit; FD-SOI; feedback; linearity; operational amplifier
Subject
Engineering, Electrical and Electronic Engineering
Copyright: This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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