Preprint Article Version 1 Preserved in Portico This version is not peer-reviewed

Linearization Technique of Low Power Opamps in CMOS FD-SOI Technologies

Version 1 : Received: 14 June 2021 / Approved: 16 June 2021 / Online: 16 June 2021 (10:20:52 CEST)

A peer-reviewed article of this Preprint also exists.

Kuzmicz, W. Linearization Technique of Low Power Opamps in CMOS FD-SOI Technologies. Electronics 2021, 10, 1800. Kuzmicz, W. Linearization Technique of Low Power Opamps in CMOS FD-SOI Technologies. Electronics 2021, 10, 1800.

Journal reference: Electronics 2021, 10, 1800
DOI: 10.3390/electronics10151800

Abstract

Negative feedback to the back gate of MOS devices available in FD-SOI technologies can be used to improve linearity of operational amplifiers. Two operational amplifiers designed and fabricated in a 22nm FD-SOI technology illustrate this technique, its advantages and limitations.

Subject Areas

CMOS analog integrated circuit; FD-SOI; feedback; linearity; operational amplifier

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