Submitted:
19 September 2026
Posted:
21 September 2026
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Abstract
The E80 is an open-source, 8-bit, single-cycle soft processor written in VHSIC Hardware Description Language (VHDL) from gates, multiplexers, and flip-flops, without an arithmetic package. Its 39 instructions were derived from 371 program samples in eight sources of introductory computer architecture material. They cover almost 80% of the operations recorded, averaged per source. A toolchain takes an assembly program to a simulation waveform with one keystroke. Presets cover three low-cost field-programmable gate array (FPGA) boards, one on a fully open-source flow. This extended version removes a false combinational loop from the datapath, so the design passes timing analysis on all three flows without workarounds. A serial light-emitting diode (LED) matrix mirrors the simulation signals on the board. Execution can be slowed or stepped one instruction at a time. A self-checking program decides the conformance of every instruction from the final program counter alone. The largest program in the surveyed material, a recursive maze search written for a 16-bit machine, was ported without abridgement into 208 of the 255 memory words. The effect on learning remains unmeasured.
Keywords:
soft processor
; single-cycle processor
; instruction set architecture
; VHDL
; computer architecture education
; digital design education
; FPGA
; microworld
; constructionism
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