Sub-Millijoule Intrusion Detection on a Commodity MCU Neural Processing Unit: A Four-Dataset Deployment Study

We deploy an intrusion detection classifier on the STM32N6570-DK, a Cortex-M55 MCU with the Neural-ART NPU. Using the approximate T = 1 SNN–INT8 ANN equivalence, we compile a lightweight MLP to the NPU and evaluate four datasets: NSL-KDD (5-class), UNSW-NB15 (10-class), CICIDS2017 (15-class), and IoT-23 (5-class). Results are reported as mean ± std over multi-seed runs (5–20 seeds), with paired Wilcoxon signed-rank tests and Holm–Bonferroni correction. Across all datasets, INT8 NPU inference runs in 0.29–0.46 ms (2.7–4.2× faster than the same model on Cortex-M55 CPU), with estimated energy 44–69 μJ per inference and Flash 105–138 KB. Compared with recent MCU-class deployments on STM32F7 (31 ms, 7.86 mJ) and Raspberry Pi 3B+ (27 ms), our path delivers 59–107× lower latency; the estimated energy envelope implies 114–179× lower energy than STM32F7. QCFS and ReLU are statistically indistinguishable on all four datasets (p ≥ 0.227), supporting practical T = 1 near-equivalence under commodity MCU deployment constraints. Energy is estimated from STMicroelectronics application note AN5946 rather than direct on-board measurement, and UNSW-NB15 shows greater INT8 quantization fragility than NSL-KDD. We frame this as a deployment case study on a commodity Cortex-M-class MCU paired with a general-purpose NPU (Neural-ART), bounded by a documented systematic literature search (Supplementary File S1).