preprints.org > computer science and mathematics > logic > doi: 10.20944/preprints202403.0286.v2

Preprint Article Version 2 Preserved in Portico This version is not peer-reviewed

Version 1 : Received: 5 March 2024 / Approved: 5 March 2024 / Online: 6 March 2024 (07:31:34 CET)
Version 2 : Received: 10 March 2024 / Approved: 11 March 2024 / Online: 11 March 2024 (13:18:45 CET)

This paper considers a specific fragment of Linear Temporal Logic for Finite traces, DECLAREd, which, to the best of our knowledge, we prove for the first time to be a {polytime} fragment of LTLf. We derive this in terms of the following ancillary results: we propose a set of novel LTLf equivalence rules that, when applied to \LTLf specifications, lead to an equivalent specification which can be computed faster by any existing verified temporal artificial intelligence task. We also introduce the concept of temporal non-simultaneity, prescribing that two activities shall never satisfy the same atom, and temporal short-circuit, that occurs when a specification interpreted in LTL would accept an infinitely long trace while, on LTLf, it can be rewritten so to postulate the absence of certain activity labels. We test these considerations over formal synthesis (Lydia), SAT-Solvers (AALTAF) and formal verification (KnoBAB) tools, where formal verification can be also run on top of a relational database and can be therefore expressed in terms of relational query answering. We show that all these benefit from the aforementioned assumptions, as running their tasks over a rewritten equivalent specification will improve their running times.

LTLf; Declare; Verified Artificial Intelligence; Equational logic and rewriting

Computer Science and Mathematics, Logic

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