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A Novel Programming Circuit for Memristors

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Abstract
Memristor has attracted a lot of interest due to its high processing speed, low power consumption and high integration ability, which is critical for electronic systems and memory-centric computing. However, the memristor programming circuit and strategy are still inflexible and complex, since the signal generator/collector and stimulate pulse must be carefully matched and designed based on memristor intrinsic characteristics without reconfigurable. Here, a simple and effective circuit only consists a parallel reference-resistor-and-NMOS is designed to program memristor with a more than 99% memristance precision. And the amplitude and width of stimulate pulse are fixed to ±4V and 5ms, respectively. In order to cope with the device variation, such as ±10% tolerance of transition voltage, an optimized programming strategy was proposed and demonstrated great robustness. Additionally, a set of reference resistors and NMOSs have been added to facilitate multi-level memristance operation without requiring any changes to the circuit structure. This program circuit was also employed to program memristor crossbar remains 99% precision. In the end, a memristor-based convolutional neural network which controlled by our optimized programming circuit was used for image recognition, and 89.36% accuracy can be achieved even under 15.8% memristance tolerance. This novel circuit demonstrates a simple and flexible strategy in memristor programming, providing a new way to control memristor crossbar for practical application.
Keywords: 
Subject: Engineering  -   Electrical and Electronic Engineering

1. Introduction

In 1971, the memristor is the fourth basic circuit element that is proposed by L. O. Chua in theory [1]. As the fourth basic circuit element besides resistor, capacitor, and inductor, memristor has been considered as one of the next generations of non-volatile memory technology. The memristor is a nonvolatile device and has variable memristance. When the current flows through the memristor from different directions, the memristance will change accordingly. When the current cross the memristor was removed, the memristance will remained. In 2008, the first physical memristor was reported by HP labs [2]. The phenomenon of resistive switching in electronic devices has attracted wide interest from academia and industry, due to its application to store information in a memristor, enabling the development of neuromorphic and memory-centric computing systems [3,4,5,6,7,8,9].
In recent years, programmable and reconfigurable analog elements have attracted considerable attention. In the literature, there have been various studies on the programmable circuit. In 2010, Pershin et al. developed a programmable memristor circuit that includes a microprocessor, analog-to-digital converter (ADC), and digital potentiometer [10]. In 2012, Berdan et al. presented a circuit that exploited the dynamic modulation of resistance under a constant DC bias on the operation of an analog programming circuit for accurately setting the state of a memristor [11].In 2016, Merced et al. investigated memristor 1T1R arrays rapidly reaching arbitrary conductance states and programming was performed by applying an adaptive pulsed algorithm that utilized the transistor gate voltage to control the SET switching operation [12]. Kim et al. suggested an interesting tuning approach that is to exploit the voltage divider (VD) effect and its HW simplicity via a resistor in series with the memristor [13,14,15]. In 2017, Olumodeji et al. presented a circuit for accurately programming the memristor in both an incremental and a decremental fashion using auto-tuning operational amplifier's gain, which exploited the characteristics of the memristor, and this circuit took advantage of the memristor's pulse-based programmability [16]. Mokhtar et al. presented a pulse-coded memristor programming method adopted in RWC (resistance writing circuit) design. It used 2 sets of switches to decrease or increase memristance by supplying a positive or negative pulse [17]. In 2020, Tarkhan et al. presented a novel CMOS circuit for programming memristors which used a Wheatstone bridge circuit to measure the current memristance while the programming current was flowing through the device [18]. In 2022, Knowm Inc. explored different circuit topologies and approaches to perform the forming of RRAM and a target-resistance was pursued through pulsed voltage stress, followed by cycle-to-cycle stabilization using a custom trans-impedance amplifier circuit [19]. In 2022, Lu et al. analyzed the reason of the resistance state deviation of the memristor by studing predecessors on read and write circuit, and proposed a novel structure of memristor based on opposite polarity [20]. In 2023, Randrianantenaina et al. reported programmable and reconfigurable analog/digital platforms as an alternative perspective in order to promote analog and digital applications based on memristors [21].
In this paper, we suggest an approach to program memristors in analog circuits based on the threshold-type behavior of the memristor. Our main idea is to use a negative source to programs the memristor to high resistance states (HRS). The positive source then programs the memristor to aim memristance. In addition, we have added a reference resistor to program the memristor to multi-level memristance according to digital input signals. Finally, a convolutional neural network (CNN) has been trained by our circuit and 77.64% classification precision can be achieved even under 22.2% memristance tolerance. In this way, we obtain a programmable circuit that can obtain accurate memristance and has a simple structure.

2. The memristor Programmable Circuit

2.1. Memristor Model

The adopted memristor model has been proposed by Pershin Y. V. [22]. The memristor has a threshold characteristic. In other words, when the voltage applied to the memristor is greater than the threshold value, the memristance (memristor resistance) will change. Otherwise, the memristance will remains unchanged. The mathematical expressions of this model are as follows:
I ( t ) = R M 1 ( X , V M , t ) * V M ( t )
X ˙ = f ( X , V M , t )
I = X 1 * V M
d X d t = f V M [ θ V M θ ( R o f f X ) + θ ( V M ) θ ( X R o n ) ]
f V M = β V M + 0.5 α β [ V M + V t V M V t ]
where X represents n-th internal state variables, and X is a vector. V M ( t ) is the voltage applied to the memristor, I(t) is the current that flows through the memristor. V t is the memristor threshold voltage. R M is the memristance which is a scalar. R o n is the LRS and R o f f is the HRS. The θ(•) are step functions that are used to limit the memristance to the region between R o n and R o f f . The coefficients α and β define the slopes of the f V M curve below and above the threshold, which characterize the rate of memristance change at V M < V t and V M > V t , respectively.
A positive or negative voltage applied to the memristor decreases or increases the memristance R M . The device state changes only when V M > V t (for set transition V t = V s e t , and for reset transition V t = V r e s e t ). As shown in Figure 1., when the voltage value applied to the memristor is greater than the positive threshold of the memristor ( V M > V s e t ), the memristance decreases sharply, memristor tends to change from HRS to LRS, and the process is SET transition, when the voltage value applied to the memristor is less than the negative threshold of the memristor ( V M < V r e s e t ), the memristance increases sharply, memristor tends to change from LRS to HRS, and the process is RESET transition.

2.2. The Memristor Programmable Circuit

In the programmable analog circuits of memristors, Pershin et al. developed a circuit that applied negative voltage to the memristors and then use positive voltage to program the memristor's states during their operation as analog circuit elements [10]. In addition, the voltage divider effect is usually used in programmable circuit[13‒15]. This paper proposes a novel circuit by utilizing before design ideas and adding a reference resistor that is designed to be controllable. The circuit is simple and the memristance is configurable.
When programming the memristor, if the memristance is greater than the aim value, it is necessary to decrease the memristance through a SET process. If the memristance is less than the aim value, it is necessary to increase the memristance through a RESET process. Before programming the memristor, it is first to obtain the greatest memristance value R o f f by RESET process. Then it programs the memristor to aim value. In addition, we also add a reference resistor which contributes to obtaining aim memristance, through this structure the memristance is configurable. The memristance is related to the reference resistor, and the reference resistor is controlled by digital input signals. The proposed memristor programmable circuit structure contains one memristor, one NMOS, and one reference resistor as shown in Figure 2. R M is the memristor, R is the reference resistor, and M is the NMOS, respectively.
The programming progress contains two steps:
Step 1: the input source V i n ( | V i n | > | V r e s e t | ) is negative. the current flows through NMOS (NMOS can be regarded as a diode) and then through memristor R M to reset the memristor, as shown in Figure 3. So, the memristance increases sharply to R o f f .
Step 2:the input source V i n is positive, and the current flows through memristor R M and reference resistor R (NMOS can be regarded as open), as shown in Figure 4. The voltage applied to the memristor is positive (it must match | V i n | > | V s e t | ), and the voltage value is
V M = R M R M + R * V i n
when V M > V s e t , memristor SET, the memristance decreases gradually, and the memristor voltage value also decreases gradually, until V M = V s e t . When V M = V s e t , the memristor stops SET, so the memristance does not change and remains a certain value, the memristance value is
R M = V s e t V i n V s e t * R
where V i n is the input source, V s e t is the memristor SET transition voltage, R is the reference resistor.
When V i n = 2 V s e t 0 , R = R 0 , V s e t = V s e t 0 , the memristance value can be set to R 0 after the programmable process. Hence, if we want to program the memristor to R 0 , we only need to set the reference resistor R = R 0 .

2.3. The Simulation of the Memristor Programmable Circuit

Figure 5. shows the simulation result of the memristor programmable circuit. The width of the programming process is 10ms. The first 0-5ms is the period of Step 1, during which the memristor RESET and the memristance increases to R o f f . And the following 5-10ms is the period of Step 2, during which the memristor SET and the memristance decrease to the aim value. When the reference resistor is R = 1 k Ω , the memristance simulation result is 0.9999 k Ω , compared with reference resistor R, the accuracy of the simulation result is more than 99%. When the reference resistor is R = 8 k Ω , the memristance simulation result is 8.0097 k Ω ; corresponding to a more than 99% simulation accuracy. The simulation result shows that the programmable circuit function is correct, and the circuit has high precision.

3. Reference Resistor Control Circuit

3.1. The Reference Resistor Circuit

The reference resistor circuit is shown in Figure 6., which is composed of four NMOSs and four resistors. Different from the same type of NMOSs, the resistors are selected with 1 k Ω 、1 k Ω 、2 k Ω 、4 k Ω . The four different resistors can achieve different R e q values. The control signals are b 3 ¯   b 2 ¯   b 1 ¯ , which are input digital signals. The reference resistor value is
R e q = R 0 + R 1 * b 1 ¯ + R 2 * b 2 ¯ + R 3 * b 3 ¯
where R 0 R 1 R 2 R 3 are reference resistors; b 3 ¯   b 2 ¯   b 1 ¯ are input digital control signals.
The memristor programming circuit can be adjusted to be controlled by more digital input signals, thus the memristor could be programmed to multi-level states. As is shown in Figure 7. b n ¯ b 1 ¯ are the control digital signals which can program memristor to multi-level memristance. The reference resistor value is
R e q = R 0 + R 1 * b 1 ¯ + + R n * b n ¯
where R 0 R 1 、… 、 R n are reference resistors; b 1 ¯ b n ¯ are digital control signals;

3.2. The Simulation of the Reference Resistor Circuit

The simulation results are shown in Figure 8. The programming time cycle is 10ms. The first 5ms is the period of Step 1, and in this period the memristor can be reset to R o f f . And the second 5ms is the period of Step 2, and in this period the memristor will be set to the aim value. When b 3 ¯   b 2 ¯   b 1 ¯ = 000 ~ 111 , the memristance simulation results are 1.0001 k Ω 、 2.0003 k Ω 、 3.0001 k Ω 、 4.0016 k Ω 、 5.0005 k Ω 、 6.0023 k Ω 、 7.0045 k Ω 、 8.0087 k Ω , respectively. All of these simulation results keep 99% programming precision with R e q .
Table 1 shows the relationship between b 3 ¯   b 2 ¯   b 1 ¯ and R e q ; The digital input signals are b 3 ¯   b 2 ¯   b 1 ¯ = 000 ~ 111 , and the equivalent reference resistor is R e q = 1 k Ω ~ 8 k Ω , respectively. The memristance simulation results are also shown in Table 1.
b 3 ¯ b 2 ¯ b 1 ¯
R e q

4. Precision Analysis and simulation

From the formula (7), we know that the tolerances of V i n V s e t R have an influence on memristance precision. In this paper, we only discuss the tolerance of V s e t which is a parameter of memristor intrinsic characteristics. Considering memristor V s e t has 10% tolerance and assuming the ideal value of V s e t is V s e t 0 , we discuss two conditions:
Condition 1: memristor V s e t has +10% tolerance,
V s e t = V s e t 0 1 + 10 % = 1.1 V s e t 0
Condition 2: memristor V s e t has -10% tolerance,
V s e t = V s e t 0 1 10 % = 0.9 V s e t 0
corresponding to bule and red lines in Figure 9., namely, V s e t = 2.2 V and V s e t = 1.8 V based on V s e t 0 = 2.0 V .

4.1. The Impact of V s e t Tolerance

For analysis of the impact of V s e t , we also consider memristor V s e t has 10% tolerance and assume the ideal value of V s e t is V s e t 0 , and R 0 is the aim value. We discuss two conditions:
Condition 1: memristor V s e t has +10% tolerance
When V i n = 2 V s e t 0 , R = R 0 , V s e t = V s e t 0 1 + 10 % = 1.1 V s e t 0 , the memristance value is
R M = 1.22 2 R 0
In Figure 10., when the positive threshold of the memristor is V s e t = 2.2 V and the digital input signals are b 3 ¯   b 2 ¯   b 1 ¯ = 000 ( R e q = 1 k Ω ), the simulation value of memristance is R M = 1.2224 k Ω ; when the positive threshold of the memristor is V s e t = 2.2 V and the digital input signals are b 3 ¯   b 2 ¯   b 1 ¯ = 111 ( R e q = 8 k Ω ), the simulation value of memristance is R M = 9.7921 k Ω . The simulation value of memristance conforms to the theoretical value.
Condition 2: memristor V s e t 0 has -10% tolerance
When V i n = 2 V s e t 0 , R = R 0 , V s e t = V s e t 0 1 10 % = 0.9 V s e t 0 , the memristance value is
R M = 0.818 R 0
In Figure 10., when the positive threshold of the memristor is V s e t = 1.8 V and the digital input signals are b 3 ¯   b 2 ¯   b 1 ¯ = 000 ( R e q = 1 k Ω ), the simulation value of memristance is R M = 0.8181 k Ω ; when the positive threshold of the memristor is V s e t = 1.8 V and the digital input signals are b 3 ¯   b 2 ¯   b 1 ¯ = 111 ( R e q = 8 k Ω ), the simulation value of memristance is R M = 6.5496 k Ω . The simulation value of memristance also conforms to the theoretical value.

5. Optimized Circuit

Through the previous analysis, we know the tolerance of V s e t has an influence on memristance precision. This proposes a solution to optimize the memristance precision by adjusting the values of V i n and R . However, it does not need to change the structure of the circuit. For example, when V i n = 3 V s e t 0 , R = 2 R 0 , V s e t = V s e t 0   ( R 0 is the aim value, V s e t 0 is the ideal value), it can still precisely program memristance R M = R 0 . In Figure 11., when the positive threshold of the memristor is V s e t = 2 V and the digital input signals are b 3 ¯   b 2 ¯   b 1 ¯ = 000 ( R e q = 1 k Ω ), the simulation value of memristance is R M = 1.0001 k Ω ; when the positive threshold of the memristor is V s e t = 2 V and the digital input signals are b 3 ¯   b 2 ¯   b 1 ¯ = 111 ( R e q = 8 k Ω ), the simulation value of memristance is R M = 8.0010 k Ω . The memristance simulation results are equal to R e q with an acceptable error. It proves that this solution is effective. Now, considering the tolerance of V s e t , discuss two conditions:
Condition 1: memristor V s e t has +10% tolerance
When V i n = 3 V s e t 0 , R = 2 R 0 , V s e t = V s e t 0 1 + 10 % = 1.1 V s e t 0
R M = 1.158 R 0
In Figure 11, when the positive threshold of the memristor is V s e t = 2.2 V and the digital input signals are b 3 ¯   b 2 ¯   b 1 ¯ = 000 ( R e q = 1 k Ω ), the simulation value of memristance is R M = 1.1576 k Ω ; when the digital input signals are b 3 ¯   b 2 ¯   b 1 ¯ = 111 ( R e q = 8 k Ω ), the simulation value of memristance is R M = 9.2626 k Ω ; the simulation value of memristance conforms to the theoretical value.
Condition 2: memristor V s e t has -10% tolerance
When V i n = 3 V s e t 0 , R = 2 R 0 , V s e t = V s e t 0 1 10 % = 0.9 V s e t 0
R M = 0.857 R 0
In Figure 11, when the positive threshold of the memristor is V s e t = 1.8 V and the digital input signals are b 3 ¯   b 2 ¯   b 1 ¯ = 000 ( R e q = 1 k Ω ), the simulation of memristance is R M = 0.8569 k Ω ; when the digital input signals are b 3 ¯   b 2 ¯   b 1 ¯ = 111 ( R e q = 8 k Ω ), the simulation of memristance is R M = 6.8611 k Ω ; the simulation value of memristance also conforms to the theoretical value. Condition 1 and condition 2 confirm that properly adjusting the values of V i n and R can optimize the memristance precision. However, it needs a higher voltage value of source V i n , so it should make a tradeoff between memristance precision and input voltage value.

6. Memristor Crossbar Programming Circuit

Besides the single memristor device, our programming circuit can also be used to control the memristor crossbar precisely. For example, as shown in Figure 12., in an mxn 1T1R memristor crossbar, the row signals are controlled by selectors S 1 S 2 、……、 S n , and the column signals are controlled by selectors S n + 1 S n + 2 、……、 S n + m . Through selecting specific row signal and column signal, it can program specific memristor in the memristor crossbar precisely. It also takes two steps to program the memristor. In addition, in the former structure, it uses a single source ( V i n ) to program the memristor where a negative pulse is necessary. Here, we use two sources ( V i n 1 & V i n 2 ) to stimulate the memristor crossbar and these sources are all positive bias.
There are also two steps to program the memristor which is illustrated as follows. Taking an example on a 3x3 1T1R memristor crossbar and the memristor in the second row and second column needs to be updated. In Step1, as in Figure 13.(a), V i n 1 is 0V and V i n 2 is 4V which triggers memristance increases sharply until to R o f f , the memristor completes RESET process. In Step2, V i n 1 is 4V while the V i n 2 is 0V which makes the memristance of the memristor is programmed to aim value gradually, and the memristor completes the programming process. The programming process for the other memristors is similar.
Figure 14 are simulation waveforms, 1-6ms is Step 1, and 6-11ms is Step 2. When the positive threshold of the memristor is V s e t = 2 V and the digital input signals are b 3 ¯ b 2 ¯ b 1 ¯ = 000 ( R e q = 1 k Ω ), the simulation value of memristance is R M = 0.9998 k Ω ; when the digital input signals are b 3 ¯ b 2 ¯ b 1 ¯ = 111 ( R e q = 8 k Ω ), the simulation value of memristance is R M = 8.008 k Ω . The simulation results agree with the aim values and the precision is more than 99%.

7. Application

With the advent of the big data era, the scale of information has been explosive growth. And the scale of image data is also increasing explosively. However, in the conventional computing architecture, computation and storage is physically separate. It requires frequent data shuttling among the computation and storage units, which causing significant system consumption and speed loss. Hence, it is difficult to emulate the requirements of information analysis and processing [23,24,25]. Memristors with nonvolatility and integrated storage-and-computation properties can be used to build intelligent processing systems that are closer to the structure and function of biological brains [26,27]. They are also of great significance for achieving the integrated storage and computation for image data [28].
As Figure 15(a), it is a CNN architecture for image recognition based on memristor crossbar arrays. Inputs are images for recognition, and outputs are the results of recognition. On platform MNSIM [29], we analyzed the computing accuracy of different memristance tolerance. The algorithm uses VGG8 and the dataset uses CIFAR10. The size of input image is 28x28, hence, the network consists of 784 input neurons. In addition, the numbers of convolution layers and pooling layers are 8 and 5, respectively. And 10 output neurons are corresponding to 10 kinds of classification targets. Hardware configuration is Intel Xeon Gold 6248 @2.50GHz CPU. System is Windows Server 2019 and its word length is 64 bits.
From Table 2., taking 10% tolerance of V s e t into consideration. As mentioned above, the memristance tolerances of the circuit before and after optimization are 22.22% and 15.8%. Hence, we analyzed the computing accuracy of three memristance tolerance 1%, 15.8%, and 22.2%. As Figure 7.(b), the computing accuracy is 93.45% (original accuracy). For computing based on memristor crossbar arrays, when the memristance tolerance is 1%, the computing accuracy is 93.09%, and the computing accuracy decreased to 89.36% and 77.64% with the memristance tolerance of 15.8% and 22.22%, respectively. The latency of the network training directly by traditional computer is about 7.47s, while this value decreased to 18.78ms based on memristor crossbar arrays, and the time efficiency improved more than 396 times.

8. Conclusion

In this paper, a novel memristor programming circuit with a reference resistor structure is proposed which can achieve precise memristance, and the function of the circuit has been fully verified by simulation. Just as the memristance adjustment is sensitive to the memristor V s e t , this paper analyzed the precision of the memristance under the memristor V s e t has ±10% tolerance, and proposed a solution to improve the memristance precision at the cost of increasing input voltage value without changing the circuit structure. In order to complete the circuit design, it should make a tradeoff between the memristance precision and the input voltage value. In addition, this paper demonstrates that the circuit can be applied to the memristor crossbar and the simulation results of the circuit verify the programming function on the memristor crossbar. In the end, this paper analyzed the computing accuracy of different memristance tolerance in the CNN image recognition based on memristor crossbar arrays.

Author Contributions

Direction of the research , Shisheng Xiong; methodology , Shengtao Tu; circuit design, Shengtao Tu; simulation of the circuit, Shengtao Tu; software, Jinyu Li. writing—original draft preparation, Shengtao Tu; writing—review and editing, Shengtao Tu, Shisheng Xiong, Yanyun Ren, and Qin Jiang; All authors have read and agreed to the published version of the manuscript.

Funding

The work was supported by National Natural Science Foundation of China (Nos. U20A20227).

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Simulation I-V curve of the memristor. V s e t is the positive threshold with the value of 2.0V. When the voltage applied to the memristor is greater than 2.0V, the memristance decreases to R o n sharply. V r e s e t is the negative threshold with the value of -2.0V. When the voltage applied to the memristor is less than -2.0V, the memristance increases to R o f f sharply.
Figure 1. Simulation I-V curve of the memristor. V s e t is the positive threshold with the value of 2.0V. When the voltage applied to the memristor is greater than 2.0V, the memristance decreases to R o n sharply. V r e s e t is the negative threshold with the value of -2.0V. When the voltage applied to the memristor is less than -2.0V, the memristance increases to R o f f sharply.
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Figure 2. Memristor programming circuit. R M is the memristor that to be programmed, R is the reference resistor and M is the NMOS.
Figure 2. Memristor programming circuit. R M is the memristor that to be programmed, R is the reference resistor and M is the NMOS.
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Figure 3. Step 1 of the memristor programming process. In this period, input source V i n is negative. The current flows through M and R M , as the red arrows in the picture. And the voltage applied to the memristor is negative.
Figure 3. Step 1 of the memristor programming process. In this period, input source V i n is negative. The current flows through M and R M , as the red arrows in the picture. And the voltage applied to the memristor is negative.
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Figure 4. Step 2 of the memristor programming process. In this period, input source V i n is positive. The current flows through R M and R, as the blue arrows in the picture. And the voltage applied to the memristor is positive.
Figure 4. Step 2 of the memristor programming process. In this period, input source V i n is positive. The current flows through R M and R, as the blue arrows in the picture. And the voltage applied to the memristor is positive.
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Figure 5. Simulation of the programmable circuit. The black line is the input source V i n , and the value is -4.0V during first 5ms and 4.0V during second 5ms of the pulse. The blue line represents the memristance when the reference resistor is R = 1 k Ω . The red line represents the memristance when the reference resistor is R = 8 k Ω .
Figure 5. Simulation of the programmable circuit. The black line is the input source V i n , and the value is -4.0V during first 5ms and 4.0V during second 5ms of the pulse. The blue line represents the memristance when the reference resistor is R = 1 k Ω . The red line represents the memristance when the reference resistor is R = 8 k Ω .
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Figure 6. The reference resistor circuit with 3-input bits. R 0 R 1 R 2 R 3 are reference resistors; b 3 ¯   b 2 ¯   b 1 ¯ are digital control signals. The circuit is equivalent to the circuit diagram in the dashed box. R e q is an equivalent resistance. M e q is an equivalent NMOS.
Figure 6. The reference resistor circuit with 3-input bits. R 0 R 1 R 2 R 3 are reference resistors; b 3 ¯   b 2 ¯   b 1 ¯ are digital control signals. The circuit is equivalent to the circuit diagram in the dashed box. R e q is an equivalent resistance. M e q is an equivalent NMOS.
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Figure 7. The reference resistor circuit with n-input bits. R 0 R 1 、… 、 R n are reference resistors; b n ¯ b 1 ¯ are digital control signals. The circuit is equivalent to a circuit diagram in the dashed box. R e q is the equivalent resistance and M e q is the equivalent NMOS.
Figure 7. The reference resistor circuit with n-input bits. R 0 R 1 、… 、 R n are reference resistors; b n ¯ b 1 ¯ are digital control signals. The circuit is equivalent to a circuit diagram in the dashed box. R e q is the equivalent resistance and M e q is the equivalent NMOS.
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Figure 8. Simulation of the programmable circuit according to different input signals. The black line is the input source V i n . And the color lines are the memristances evolution as the function of different reference resistors.
Figure 8. Simulation of the programmable circuit according to different input signals. The black line is the input source V i n . And the color lines are the memristances evolution as the function of different reference resistors.
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Figure 9. Simulation I-V curve of the memristor. The red I-V curve is the memristor with the transition voltage of V s e t = 1.8 V . The blue I-V curve is the memristor with the transition voltage of V s e t = 2.2 V .
Figure 9. Simulation I-V curve of the memristor. The red I-V curve is the memristor with the transition voltage of V s e t = 1.8 V . The blue I-V curve is the memristor with the transition voltage of V s e t = 2.2 V .
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Figure 10. Simulation precision of the circuit. The black line is the input source V i n , and the color lines are the memristances based on different transition voltage tolerances as the function of stimulation time.
Figure 10. Simulation precision of the circuit. The black line is the input source V i n , and the color lines are the memristances based on different transition voltage tolerances as the function of stimulation time.
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Figure 11. Simulation of the optimized circuit. The black line is the input source V i n , and the color lines are the memristances evolution based on optimized circuit.
Figure 11. Simulation of the optimized circuit. The black line is the input source V i n , and the color lines are the memristances evolution based on optimized circuit.
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Figure 12. Memristor crossbar programmable circuit. S 1 S 2 、……、 S n are the selectors of 1T1R crossbar rows. S n + 1 S n + 2 、……、 S n + m are the selectors of 1T1R crossbar columns. V i n 1 and V i n 2 are two input sources.
Figure 12. Memristor crossbar programmable circuit. S 1 S 2 、……、 S n are the selectors of 1T1R crossbar rows. S n + 1 S n + 2 、……、 S n + m are the selectors of 1T1R crossbar columns. V i n 1 and V i n 2 are two input sources.
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Figure 13. memristor crossbar programmable circuit. The states of selectors S 2 and S 4 are ON; while the states of other selectors are OFF. (a) Step1. In this period, input source V i n 1 is 0V and V i n 2 is 4V. (b) Step2. In this period, input source V i n 2 is 0V and V i n 1 is 4V.
Figure 13. memristor crossbar programmable circuit. The states of selectors S 2 and S 4 are ON; while the states of other selectors are OFF. (a) Step1. In this period, input source V i n 1 is 0V and V i n 2 is 4V. (b) Step2. In this period, input source V i n 2 is 0V and V i n 1 is 4V.
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Figure 14. Memristor crossbar programmable circuit simulation. The red line is the source V i n 1 , and the value is 0V during 1-6ms and 4.0V during 6-11ms. The blue line is the source V i n 2 , and the value is 4V during 1-6ms and 0V during 6-11ms. The purple line represents the memristance evolution when the reference resistor is R e q = 8 k Ω and the cyan line represents the memristance evolution when the reference resistor is R e q = 1 k Ω .
Figure 14. Memristor crossbar programmable circuit simulation. The red line is the source V i n 1 , and the value is 0V during 1-6ms and 4.0V during 6-11ms. The blue line is the source V i n 2 , and the value is 4V during 1-6ms and 0V during 6-11ms. The purple line represents the memristance evolution when the reference resistor is R e q = 8 k Ω and the cyan line represents the memristance evolution when the reference resistor is R e q = 1 k Ω .
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Figure 15. (a) A CNN architecture for images recognition; (b) Computing accuracy of the different memristance tolerance.
Figure 15. (a) A CNN architecture for images recognition; (b) Computing accuracy of the different memristance tolerance.
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Table 1. The simulation results based on different b 3 ¯   b 2 ¯   b 1 ¯ and R e q .
Table 1. The simulation results based on different b 3 ¯   b 2 ¯   b 1 ¯ and R e q .
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Table 2. Memristance precision comparison.
Table 2. Memristance precision comparison.
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Table 3. Simulation result of memristance.
Table 3. Simulation result of memristance.
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