preprints.org > engineering > electrical & electronic engineering > doi: 10.20944/preprints201804.0053.v1

Preprint Article Version 1 This version is not peer-reviewed

Version 1 : Received: 4 April 2018 / Approved: 4 April 2018 / Online: 4 April 2018 (08:02:01 CEST)

This paper presents a 612–1152 MHz Injection Locked Frequency Multiplier (ILFM). The proposed ILFM is only used for sending an input signal to the receiver in the I/Q mismatch calibration mode. Using the Phase-Locked Loop (PLL) to calibrate the receiver places a burden on this system due to the extra area required and power consumption. Instead of the PLL, to satisfy high frequency, low jitter, and low area, a Ring Oscillator is proposed. The free-running frequency of the ILFM is automatically digitally calibrated to reflect the frequency of the injected signal from the harmonics of the reference clock. To control the frequency of the ILFM, the load current is digitally tuned with 6-bit digital control signal. The proposed ILFM locks to the target frequency using a digitally controlled Frequency Locked Loop (FLL). This chip is fabricated using 1-poly 6-metal 0.18 µm CMOS and achieve the wide tuning range of 612–1152 MHz. The power consumption is 0.95 mW from a supply voltage of 1.8 V. The measured phase noise of the ILFM is −108 dBc/Hz at a 1 MHz offset.

injection locked frequency multiplier; Frequency Locked Loop (FLL); phase noise