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Faster but Not Different: Parity-Checked Deployment of the SmolVLA Robot Policy on a Jetson Xavier NX

Submitted:

07 November 2026

Posted:

10 November 2026

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Abstract
Vision-language-action (VLA) policies are now small enough for embedded GPUs, but compiling one for such hardware can change its actions without raising any error. We deploy SmolVLA, a 450M-parameter VLA policy, on an NVIDIA Jetson Xavier NX and make agreement with the reference implementation a precondition for every speed-up. The policy is exported as three static ONNX graphs (the vision encoder, the VLM prefix and one step of the action expert), its flow-matching loop runs in a C++17 runtime, and every split point is compared with LeRobot's own fp32 tensors, frozen from real LIBERO frames. With TensorRT 8.5, fp32 engines match LeRobot to 1.6×10−5 action standard deviations at 1.0 s per 50-action chunk. fp16 engines run 3.1 times faster, at 0.33 s, and stay within 0.060 standard deviations, inside the range of the bf16 precision LeRobot itself runs this checkpoint in. They do so only once every layer the graph types as fp32 is pinned to fp32: TensorRT 8.5's default fp16 build returns finite actions unrelated to the reference. We describe this and four further pitfalls the parity checks exposed, and release the code, measurements and figures.
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