Custom Adaptive Kernel Strategies for Gaussian Process Regression in Wafer-Level Modeling and FPGA Delay Analysis

1. Introduction

Large-scale integrated circuits and field-programmable gate arrays are receiving significant attention in modern technology. Many sectors, from automotive to healthcare, rely heavily on these technologies. While LSIs offer high-density integration and optimized performance, FPGAs provide flexibility and reconfigurability, making them complementary technologies in many applications [1,2,3,4]. Given their critical role, ensuring device reliability through comprehensive testing has become paramount, as faulty devices can significantly impact system operations and societal functionality. This necessitates extensive testing across various manufacturing stages under diverse conditions [5]. As these semiconductor devices grow in complexity and functionality, the volume of required tests has surged, resulting in rising test costs. This escalating expense is a major concern, as testing now constitutes a substantial portion of the overall manufacturing cost for both LSIs and FPGAs [6,7,8,9,10]. The challenge of maintaining thorough testing while managing costs is particularly pronounced in FPGAs, where the reconfigurable nature of the device adds an extra layer of complexity to the testing process. Various test cost reduction methods have been proposed that apply data analytics, machine learning algorithms, and statistical methods [11,12,13,14,14]. In particular, the wafer-level characteristic modeling method based on the statistical algorithm is the most promising candidate that reduces the test cost, that is, measurement cost, without impairing the test quality [14,15,16,17,18,19,20,21]. On the other hand, the state-of-the-art FPGA estimation proposed in [8,9,10] shows that the estimated measurements can be drastically reduced through a compressed sensing-based virtual probe technique [8,9,22,23,24]. However, as experimentally shown in [13,25,26], the experiments are conducted using wafer measurement data from a mass industry production, the Gaussian process GP-based estimation method surpasses the techniques presented in [8,9,16,17,18,19] which is based on compressed sensing [23,24]. Because the estimation eliminates the need for measurement, it not only reduces the cost of measurement but also can be used to reduce the number of test items and/or change the test limits, which is expected to improve the efficiency of adaptive testing [27,28,29,30]. In [15], the expectation-maximization (EM) algorithm [31] was used to predict the measurement. The Gaussian process-based method provides more accurate prediction results [13,14,20,21,25,26]. The use of GP modeling has another side benefit. As it calculates the confidence of a prediction, the user can confirm whether the number and location of measurement samples are sufficient, and suitable or not, being a great advantage from a practical viewpoint. In addition, since the GP can calculate the uncertainty of the estimation result, the user can confirm whether the number and location of measurement samples are sufficient and suitable or not.

Figure 1 presents an experimental analysis in the form of a heat map, showing the full measurement results for a wafer of a 28 nm analog/RF device with a 10% estimation. The figure includes three heat maps (a, b, c), where (a) represents the actual measured data, while (b) and (c) show the predicted data using a virtual probe and Gaussian process regression (GPR), respectively. In both cases, 10% of the samples are used to estimate the remaining 90% of the unmeasured samples. It is evident from the figure that both VP and GPR effectively address and accurately predict the unknown measured data with high accuracy and minimal error.

Figure 2 shows a similar experiment with delay information in look-up tables (LUTs) using ring oscillators (ROs). The figure includes three heat maps (a, b, c), where (a) represents the actual measured data, while (b) and (c) show the predicted data using a 10% virtual probe and 10% training data for the Gaussian process regression (GPR), respectively, The figure shows the similar trend on Figure 1 and in both cases VP and GPR effectively address as well as accurately predict the unknown measured data with high accuracy and minimal error.

The VP technique exploits the sparsity of frequency-domain components in spatial process variation for prediction. Due to the gradual nature of process variation in FPGAs and wafers, high-frequency components approach zero, allowing seamless integration with fingerprinting techniques. The method’s effectiveness is validated through silicon measurements on commercial FPGAs.

Unlike VP’s direct frequency-domain approach, GPR models spatial process variation as a probabilistic distribution using kernel-based correlation analysis. This technique effectively handles gradual variations through Gaussian process smoothing, making it ideal for probabilistic predictions. Experimental validation using commercial FPGAs and wafer analog/RF device data demonstrates the method’s effectiveness [33,34,35,36,37].

However, when applying GPR, it is most important to select the best kernel function, but the appropriate kernel function for LSI testing is not well understood. Since there is no effective method for investigating kernel function selection, this study applies GPR to mass production LSI test data, experimentally compares a large number of kernel functions, and identifies the best kernel function. Furthermore, based on this evaluation, we demonstrate that estimation accuracy can be further improved by using multiple kernel functions with high estimation accuracy. The hybrid or mixture kernels are proposed in [35,36,37,38] where different modes of mixing and combining are explained. In Section 3, sum of two product kernels $(k_{\mathrm{RBF}}·k_{\mathrm{Lin}}+k_{\mathrm{RBF}}·k_{\mathrm{RQ}})·k_{\mathrm{Multiplication}}$ achieves the best result than any individual kernel.

Most importantly, even when one single kernel or composite kernel function works well, it may not outperform others in different datasets with similar performance. Additionally, composite or adaptive kernels with too many parameters may suffer from overfitting issues. This study aims to determine a custom adaptation based on estimation prediction confidence to select the top two candidates for adaptation with dynamic weight adjustment based on the estimation confidence, instead of using fixed-weight adaptive kernels. Unlike typical hybrid or mixture kernels proposed in [35,36,37,38], this approach determines the weight of each kernel based on their difference in confidence levels. After an exhaustive analysis of various kernel functions across all possible combinations, using actual industry production data and real silicon data, it was observed that the proposed custom adaptive kernel consistently outperformed across two different datasets.

The remainder of this paper is organized as follows: Section 2 provides an overview of GP-based modeling for wafer and FPGA process variations. Section 3 details the kernel function and proposed custom adaptive kernel strategies. Section presents a quantitative evaluation of the proposed custom kernel approach compared to conventional approaches. Finally, Section 5 offers the conclusion.

2. Gaussian Process Regression for Semiconductor Reliability

A Gaussian distribution is a type of probability distribution for continuous variables, also known as a normal distribution. In this distribution, the mean, mode, and median are identical, and the distribution is symmetric around the mean. Since it is continuous rather than discrete, the distribution is represented as a smooth curve rather than a histogram. The probability density function of the Gaussian distribution is given by:

$${\displaystyle \frac{1}{\sqrt{2\pi }\sigma }}·e^{-{\displaystyle \frac{{(x-\mu )}^2}{2{\sigma }^2}}},$$

(1)

where $\mu$ represents the expected value (mean) and $\sigma$ denotes the standard deviation.

The probability distribution treats the function $f\left(x\right)$ as a random variable, creating a probabilistic model that predicts y for a given input x. When $f\left(x\right)$ is defined, the outputs $f\left(x_1\right),f\left(x_2\right),\dots ,f\left(x_N\right)$ for inputs $x_1,x_2,\dots ,x_N$ follow a Gaussian process. The joint distribution of $y\left(x\right)$ at any set of points $x_1,x_2,\dots ,x_N$ is Gaussian. This property holds true even as N approaches infinity, making a Gaussian process an infinite-dimensional Gaussian distribution.

As illustrated in Figure 3, Gaussian process methods are used to model the relationship between input X and output Y. This relationship is expressed mathematically as:

$$Y=f\left(\right[X,Y\left]\right)+\epsilon ,$$

(2)

where $\epsilon$ represents the model’s noise or uncertainty. Data collected from the Wafer and FPGA are used to establish this relationship. Using this model, we can estimate the new output $Y(n+1)$ for both Wafer and FPGA is the new input data $X(n+1)$. The model is constructed as a function of the probability distribution using Bayesian inference.

As mentioned earlier, the semiconductor industry is pursuing methods to improve quality without increasing test costs, or to reduce costs while maintaining quality. Particularly for the latter, wafer-level characteristic modeling methods based on statistical algorithms yield good results. This model uses Gaussian process regression for prediction, creating a prediction model based on limited sample measurements on the wafer surface or FPGA lookup table to predict the entire wafer surface and entire lookup tables.

Figure 4a–c illustrate how the model the relationship between input x and output y. Data D is utilized to model the relationship. The new output y(n+ 1) for the new data x (n+ 1) is estimated based on the model. The model is calculated as a function of the probability distribution with the Bayesian manner.

3. Proposed Custom Adaptive Kernel Approach

The GP-based regression employs kernel functions from the GPy [32] framework to model and predict the characteristics of LSIs and FPGAs.

This method learns from the measurement results of a small number of LSIs on the wafer and FPGA delay information. After the learning phase, it determines two functions: $f(·)$, which relates to the wafer LSI coordinates, and $g(·)$, which relates to FPGA delay information in look-up tables (LUTs) using ring oscillators (ROs). These functions estimate the characteristics of unmeasured LSIs and FPGAs, significantly reducing measurement time and costs.

Let ${\mathbf{x}}_{\mathrm{wafer}}$ represent the wafer surface coordinates, and ${\mathbf{x}}_{\mathrm{fpga}}$ represent the FPGA LUT delay information. Similarly, define $y_{\mathrm{wafer}}$ and $y_{\mathrm{fpga}}$ as the respective measurement values to be predicted.

The training and test datasets are defined as follows:

For wafer data:

$$({\mathbf{X}}_{\mathrm{wafer},\mathrm{train}},{\mathbf{y}}_{\mathrm{wafer},\mathrm{train}})={\left\{({\mathbf{x}}_{\mathrm{wafer},\mathrm{i}},y_{\mathrm{wafer},\mathrm{i}})\right\}}_{i=1}^N,$$

$${\mathbf{X}}_{\mathrm{wafer},\mathrm{test}}=({\mathbf{x}}_{\mathrm{wafer},1}^{*},\dots ,{\mathbf{x}}_{\mathrm{wafer},\mathrm{M}}^{*}),$$

For FPGA data:

$$({\mathbf{X}}_{\mathrm{fpga},\mathrm{train}},{\mathbf{y}}_{\mathrm{fpga},\mathrm{train}})={\left\{({\mathbf{x}}_{\mathrm{fpga},\mathrm{i}},y_{\mathrm{fpga},\mathrm{i}})\right\}}_{i=1}^P,$$

$${\mathbf{X}}_{\mathrm{fpga},\mathrm{test}}=({\mathbf{x}}_{\mathrm{fpga},1}^{*},\dots ,{\mathbf{x}}_{\mathrm{fpga},\mathrm{Q}}^{*}),$$

where $M\gg N$ and $Q\gg P$.

Using the predictive models $f(·)$ and $g(·)$ obtained from GPR, the predicted values for the test datasets are:

$${\mathbf{y}}_{\mathrm{wafer}}^{*}=(y_{\mathrm{wafer},1}^{*},\dots ,y_{\mathrm{wafer},\mathrm{M}}^{*}),$$

$${\mathbf{y}}_{\mathrm{fpga}}^{*}=(y_{\mathrm{fpga},1}^{*},\dots ,y_{\mathrm{fpga},\mathrm{Q}}^{*}).$$

3.1. Hybrid or Mixture Kernel Strategy

The Hybrid or Mixture Kernel approach combines multiple kernel functions, each tailored to specific data characteristics, into a composite kernel. This strategy traditionally uses fixed weights for individual kernels, expressed as:

$$K_{\mathrm{composite}}=\sum _{i=1}^n{w}_i{K}_i,$$

where $K_i$ are the individual kernels, and $w_i$ are their static weights with $\sum w_i=1$. However, such static weighting lacks adaptability to varying data properties, limiting robustness and flexibility.

To address this, an adaptive hybrid kernel strategy where weights $w_i$ are dynamically adjusted based on kernel performance metrics.

3.1.1. Adaptive Kernel Strategy

The adaptive kernel strategy is designed to enhance GPR’s robustness and adaptability for semiconductor data, such as wafer variations and FPGA delays. In this case, we introduce two of the adaptive strategies first we adapt three kernel with jitter in the 4th while the second approach consider top two candidates with adaptive weights. The data

$${\mathit{D}}_1,{\mathit{D}}_2,\dots ,{\mathit{D}}_n$$

works with the kernel function

$$f\left(k_1\right),f\left(k_2\right),\dots ,f\left(k_n\right)$$

to determine the confidence of the error

$${\epsilon }_1,{\epsilon }_2,\dots ,{\epsilon }_r,$$

to identify the candidates. This strategy dynamically selects or combines kernel functions based on the data’s statistical properties, enhancing model accuracy across different production environments. The kernel combination involves forming a composite kernel by weighting multiple kernels:

$$\begin{array}{c}{K}_{\mathrm{adaptive}}(x,x^{\prime })=w_1·K_{\mathrm{Exp}}(x,x^{\prime })+w_2·K_{\mathrm{RQ}}(x,x^{\prime })\hfill \\ \hfill +w_3·K_{\mathrm{MLP}}(x,x^{\prime }),\end{array}$$

(3)

where $w_1$, $w_2$, and $w_3$ are dynamically adjusted. It improves predictive accuracy by adjusting kernel selection and weighting to match data characteristics, enhancing model robustness across varied datasets, and reducing costs in semiconductor testing by minimizing error rates. A composite kernel is then formed by weighting multiple kernels according to:

$$\begin{array}{c}\hfill K_{\mathrm{adaptive}}(x,x^{\prime })=w_1·K_{\mathrm{Exp}}(x,x^{\prime })+w_2·K_{\mathrm{RQ}}(x,x^{\prime })+w_3·K_{\mathrm{MLP}}(x,x^{\prime }),\end{array}$$

(4)

where $w_1$, $w_2$, and $w_3$ are dynamically adjusted weights.

The composite kernel $K_{composite}$ is defined as a weighted sum of individual kernels:

$$K_{composite}=\sum _{i=1}^4{w}_i{K}_i$$

(5)

where $K_i$ represents individual kernels (Exponential, MLP, RBF, and Matérn32) and $w_i$ are adaptive weights. Let $a_i$ represent their respective performance metrics, and ${\delta }_{ij}=|a_i-a_j|$ denote the performance difference between kernels i and j. Given a threshold $\tau$ for significant performance difference, the weights are determined as:

$$w_i=\left\{\begin{array}{cc}0.6\hfill & \mathrm{if}max({\delta }_{12},{\delta }_{23})>\tau \mathrm{and}i=arg\underset{k}{max}\left(a_k\right)\hfill \\ 0.35\hfill & \mathrm{if}max({\delta }_{12},{\delta }_{23})>\tau \mathrm{and}i=arg\underset{k\ne arg{max}_k\left(a_k\right)}{max}\left(a_k\right)\hfill \\ 0.4\hfill & \mathrm{if}max({\delta }_{12},{\delta }_{23})\le \tau \mathrm{and}i=arg\underset{k}{max}\left(a_k\right)\hfill \\ 0.3\hfill & \mathrm{if}max({\delta }_{12},{\delta }_{23})\le \tau \mathrm{and}i=arg\underset{k\ne arg{max}_k\left(a_k\right)}{max}\left(a_k\right)\hfill \\ 0.25\hfill & \mathrm{if}max({\delta }_{12},{\delta }_{23})\le \tau \mathrm{and}i=arg\underset{k\ne \{i_1,i_2\}}{max}\left(a_k\right)\hfill \\ 0.05\hfill & \mathrm{if}i=4\left(\mathrm{jitter}\right)\hfill \\ 0\hfill & \mathrm{otherwise}\hfill \end{array}\right.$$

(6)

where $i_1$ and $i_2$ are indices of kernels with highest and second-highest performance metrics. The final composite kernel is expressed as:

$$K_{composite}=w_1{K}_{exp}+w_2{K}_{MLP}+w_3{K}_{RBF}+w_4{K}_{M32}$$

(7)

subject to the constraints:

$$\sum _{i=1}^4{w}_i=1$$

(8)

$$0\le w_i\le 1$$

(9)

On the other hand, a more simple adaption with only two kernels can also be defined where the kernel combination involves forming a composite kernel by weighting the top two kernels and including a jitter kernel as the third component:

$$\begin{array}{c}{K}_{\mathrm{adaptive}}(x,x^{\prime })=w_1·K_{\mathrm{Exp}}(x,x^{\prime })+w_2·K_{\mathrm{RQ}}(x,x^{\prime })\hfill \\ \hfill +w_3·K_{\mathrm{jitter}}(x,x^{\prime }),\end{array}$$

(10)

where $w_1$, $w_2$, and $w_3$ are dynamically adjusted weights. Here, $w_3$ (jitter) ensures numerical stability. In this case he composite kernel $K_{composite}$ is defined as a weighted sum of individual kernels:

$$K_{composite}=\sum _{i=1}^3{w}_i{K}_i,$$

(11)

where $K_i$ represents individual kernels (Exponential, MLP, and jitter) and $w_i$ are adaptive weights. Let $a_i$ represent their respective performance metrics, and ${\delta }_{ij}=|a_i-a_j|$ denote the performance difference between kernels i and j. Given a threshold $\tau$ for significant performance difference, the weights are determined as:

$$w_i=\left\{\begin{array}{cc}0.7\hfill & \mathrm{if}i=arg\underset{k}{max}\left(a_k\right)\hfill \\ 0.25\hfill & \mathrm{if}i=arg\underset{k\ne arg{max}_k\left(a_k\right)}{max}\left(a_k\right)\hfill \\ 0.05\hfill & \mathrm{if}i=3\left(\mathrm{jitter}\right)\hfill \\ 0\hfill & \mathrm{otherwise}\hfill \end{array}\right.$$

(12)

subject to the constraints:

$$\sum _{i=1}^3{w}_i=1,0\le w_i\le 1.$$

(13)

The final composite kernel is expressed as:

$$K_{composite}=w_1{K}_{\mathrm{Exp}}+w_2{K}_{\mathrm{RQ}}+w_3{K}_{\mathrm{jitter}}.$$

(14)

3.2. Propose Custom Adaptive Model

Before discussing the proposed custom adaptive strategy, we first analyze the correlation between variance and average error, as illustrated in Figure 5 and Figure 6 where variance vs. average error scatter plot and cumulative mean of avg. error vs variance are illustrated for Matern52 and Linear Kernel respectively. In both figures, Gaussian Process Regression (GPR) is utilized to predict the input data using randomly selected 10% of the data for training, with error calculations as defined in Section 4. The “variance vs. avg. error scatter plot” and “cumulative mean of average error vs. variance” highlight this relationship in different scenarios. In the case of the Matern-52 kernel, the error remains consistently low, with the cumulative trend exhibiting a slight increase as variance grows. The scatter plot demonstrates a weak positive trend where higher variance corresponds to slightly lower errors. For the linear kernel, where the prediction uncertainty is higher, the correlation exhibits a stronger negative trend. In both cases, regardless of the kernel choice, the negative correlation establishes that lower variance is associated with lower error. A similar trend is also examined in wafer data. We examined a negative correlation between the cumulative average error and the predictive variance. Although in some cases, such as for certain wafer and FPGA paths, we observed a positive correlation for some kernels, the overall correlation averaged across the datasets was found to be negative in both cases.

Considering this relationship, the proposed custom adaptive strategy is depicted in Figure 7. The figure illustrates how kernel weights are adapted based on confidence measurements derived from the variance of predictions. In this approach, the adaptive kernel weights are calculated based on predicted variance instead of during the estimation process.

Figure 7 presents the different datasets $Dat{a}_1,Dat{a}_2,\dots ,Dat{a}_n$ with different kernel functions $f{k}_1,f{k}_2,\dots ,f{k}_r$. The Gaussian Process Regression (GPR) estimates the variance $V_1,V_2,\dots ,V_r$. for each kernel function. From these calculations, the top two candidates $f{k}_{top1}$ and $f{k}_{top2}$ are selected based on the lowest average variance among all kernels.

The weights $w_1$ and $w_2$ are defined to satisfy the following condition:

$$w_1+w_2=1,$$

(15)

where the weights are assigned based on the difference in the variances $f{k}_{top1}$ and $f{k}_{top2}$:

$$\Delta f=|f{k}_{top1}-f{k}_{top2}|.$$

(16)

The weight $w_1$ is calculated as:

$$w_1=\left\{\begin{array}{cc}0.5,\hfill & \mathrm{if}f{k}_{top1}=f{k}_{top2}\hfill \\ 0.5+\beta ·\Delta f,\hfill & \mathrm{if}f{k}_{top1}>f{k}_{top2}\hfill \\ 0.5-\beta ·\Delta f,\hfill & \mathrm{if}{f}_{ktop1}<f{k}_{top2}\hfill \end{array}\right.$$

(17)

where $\beta$ is a scaling factor to control the impact of the variance difference on the weight.

Similarly, $w_2$ is given by:

$$w_2=1-w_1.$$

(18)

Here if $f{k}_{top1}=f{k}_{top2}$, then $w_1=w_2=0.5$ and as the variance difference $\Delta f$ increases, $w_1$ increases if $f{k}_{top1}>f{k}_{top2}$ and decreases if $f{k}_{top1}<f{k}_{top2}$. The smaller the variance of $f{k}_{top1}$ compared to $f{k}_{top2}$, the more $w_1$ dominates.

This approach ensures that the kernel with higher confidence receives greater weight, reflecting its importance in the combined kernel function. The proportional adjustment of $w_1$ and $w_2$ accommodates scenarios where one kernel significantly outperforms the other in terms of variance.

Figure 8 illustrates the relationship between $w_1$, $w_2$, and the variance difference $\Delta f$. It presents a general graph and another part demonstrating how the values are calculated and estimated with two variances, 10 and 5. According to the example in Figure 8, the weights $w_1$ and $w_2$ are calculated as 0.75 and 0.25, respectively.

The proposed weighting mechanism adjusts $w_1$ and $w_2$ based on the variance difference between two kernels. The hypothesis provides a robust framework for assigning weights, ensuring that kernels with higher variance contribute more to the combined kernel function.

4. Experimental Result

In this study, we conducted experiments in two different environments for two data types. A Linux workstation with Debian on an Intel Core i7 processor and 32 GB memory is used for the wafer data. On the other hand, a Windows 11 workstation with AMD architecture and 16 GB memory is used for the FPGA data. Table 1 shows the list of kernels used in each method and the proposed method.

4.1. Experimental Setup

The detailed estimation methodology of the existing work and the proposed environment setup, including datasets for the FPGA and wafer data, the kernel list used, the framework, and the calculation of estimation errors, are explored in this section. The details about the all above are as follows:

4.1.1. Wafer Data

For wafer data, we conducted experiments using an industrial production test dataset of a 28 nm analog/RF device. Our dataset contains 150 wafers from six lots, each lot contains 25 wafers and a single wafer featuring approximately 6,000 devices under test (DUTs). In this experiment, we utilized a measured characteristic for an item of the dynamic current test, A heat map of the full measurement results for the first wafer of the sixth lot is displayed in Figure 1(a) and Figure 9. For ease of experimentation, the faulty dies were removed from the dataset. In the data set, there are 16 sites in a single touchdown. However, in this experiment, the site information is not considered separately during the training phase. Although the data comes from a multisite environment, all 16 sites are treated as a single entity because the source data does not show any discontinuous changes for each site as shown in Figure 1(a) and Figure 9

4.1.2. FPGA Data

For FPGA data, we conducted experiments using measurements using the Xilinx Artix-7 FPGA. In this experiment, 10 FPGAs (FPGA-01 to FPGA-10) were used. An on-chip measurement circuit has been implemented using 7-stages (i.e., 7 LUTs) in a Configurable Logic Block (CLB). The Ring Oscillator (RO) is based on XNOR or XOR logic gates. By keeping the same internal routing, logic resources, and structure for each RO placed in a CLB, the frequency variation caused by internal routing differences can be minimized. A total of 3,173 ROs were placed on a geometrical grid of $33\times 120$ (excluding the empty space of the layout) through hardware macro modeling using the Xilinx CAD tool, Vivado [8,9]. Figure 2(a) shows a single path’s measured frequency heat-map. This style is followed to cover the total layout of the FPGA. The Artix-7 FPGA has 6-input LUTs, which create a total of 32 ($2^6-1$) possible paths for XNOR- and XOR-based RO configurations (path-01 to path-32). In total, to complete the exhaustive fingerprint (X-FP) measurement, 32 fingerprint measurements were conducted for all the 32 paths.

4.1.3. GPR Kernel

We use all supported kernels by the GPy framework, along with the proposed hybrid and adaptive kernels, for both wafer-level and FPGA-based data.

4.1.4. Estimated Prediction Error

To quantitatively evaluate the modeling accuracy, we defined the error ($\mathit{\delta }$) between the correct (${\mathit{y}}_{\mathit{true}}$) and the predicted mean ($\mathit{\mu }$) normalized using the maximum and minimum values of ${\mathbf{y}}_{\mathit{true}}$ as follows:

$$\begin{array}{c}\hfill \mathit{\delta }={\displaystyle \frac{\mathit{\mu }-{\mathit{y}}_{\mathit{true}}}{{\mathit{d}}_{\mathit{spec}}}},\end{array}$$

(19)

where ${\mathit{d}}_{\mathit{spec}}$ indicates the range between the minimum and maximum values of the fully measured characteristics.

4.1.5. Experimental analysis

Table 2 and Table 3 shows the detailed evaluation of 150 wafers of six lots and 32 paths of 10 FPGAs respectively. Actual industry production data and actual silicon data are used in this evaluation. From the table it shows that wafer data’s smooth patterns make it suitable for both Exponential and MLP kernels, while FPGA delay’s complexity favors the Exponential kernel. MLP kernel’s performance on FPGA data may be hindered by high sensitivity to hyperparameters, especially in higher dimensions.

The Exponential kernel is consistently strong across tasks, with vRBF, GridRBF, and ExpQuad performing well on wafer data, and RatQuad and Matern52 on FPGA data. White and Linear kernels under-perform on both, suggesting non-linearity is essential. The wafer task is generally easier, while FPGA delay prediction shows higher variability, indicating greater challenge.

For wafer data, Exponential and MLP kernels are suitable, with vRBF and ExpQuad as alternatives. For FPGA delays, the Exponential kernel is best, with RatQuad and Matern52 also worth considering. Avoid White and Linear kernels for both tasks.

The Hybrid kernel and the proposed adaptive kernels also perform well while in the proposed outperforms from all the case in terms of average and most of the case individual and lot wise average for both the wafer and FPGAs.

Figure 10 and Figure 11 show the heat maps comparison for the wafer and FPGA, respectively. In the case of the wafer in Figure 10, the first wafer of the third lot is explored, while in the case of FPGA in Figure 11, the figure depicts the first path of the first FPGA with three good-performing and three bad-performing kernels.

In the wafer data, the exponential RBF and Matérn52 kernels very closely reproduce the original die, while in the case of bad performance, the linear, bias, and white kernels are also depicted in the corresponding heat maps. On the other hand, in Figure 11, the heat map of FPGA data shows that the exponential, Matérn, and TatQuad kernels are performing well, while MLP, linear, and white kernels are not performing well. From the figure, it is also clearly shown that in both cases of FPGAs and wafer data, the good-performing kernels are reflected in their corresponding heat maps as well.

The comparison of the top four performing kernels in both cases of wafer and FPGAs is depicted with a line graph in Figure 10 and Figure 12, respectively. To find a common performer in both cases, only Proposed is outperforming in the two different environments.

Finally, Figure 13 illustrates the comparison of Wafer and FPGA accuracy across different kernel configurations to explore significant insights. For wafer accuracy measurements, the hybrid kernel achieves a low error rate of 0.115, which is comparable to the best kernel’s error rate of 0.116. However, the proposed custom adaptive kernel demonstrates superior performance with the lowest Wafer error rate of 0.111.

In the FPGA dataset analysis also shown in Figure 13, the single best kernel slightly outperforms both the adaptive and hybrid kernels in baseline comparisons. Nevertheless, the Proposed custom adaptive kernel again demonstrates superior performance with the lowest FPGA error rate of 8.15, followed closely by the best kernel at 8.163 and the adaptive kernel with an error rate of 8.36. The hybrid kernel, however, exhibits notably higher FPGA error rates, indicating suboptimal performance for FPGA-based applications.

In the comprehensive analysis across both datasets, the Proposed kernel emerges as the most effective solution, consistently achieving superior performance. While the hybrid kernel demonstrates competitive accuracy in wafer-based applications, its significantly elevated FPGA error rate renders it unsuitable for universal deployment across both platforms.

5. Conclusions

This study investigated the application of Gaussian Process Regression (GPR), a state-of-the-art technique, for wafer-level variation modeling and FPGA delay prediction, with an emphasis on kernel function selection. Through exhaustive analysis, various kernel functions, including hybrid and adaptive kernels, were evaluated using wafer-level industry production data and silicon measurements from FPGAs. While no single kernel function consistently excelled across all datasets, our proposed custom adaptive kernel with a weighted kernel approach demonstrated superior versatility and reliability. This novel methodology enhances the predictive performance and adaptability of GPR, addressing limitations in current state-of-the-art applications. By offering robust accuracy across diverse scenarios, this approach presents a practical and innovative solution for optimizing semiconductor testing and production processes, with the potential to significantly reduce costs and improve efficiency. These contributions represent a meaningful advancement in leveraging GPR for semiconductor manufacturing and related domains.