Preprint Article Version 1 Preserved in Portico This version is not peer-reviewed

A Hardware Security Protection Method for Conditional Branches of Embedded Systems

Version 1 : Received: 15 April 2024 / Approved: 15 April 2024 / Online: 16 April 2024 (10:51:30 CEST)

How to cite: Hao, Q.; Xu, D.; Qin, Y.; Li, R.; Zhang, Z.; You, Y.; Wang, X. A Hardware Security Protection Method for Conditional Branches of Embedded Systems. Preprints 2024, 2024041017. https://doi.org/10.20944/preprints202404.1017.v1 Hao, Q.; Xu, D.; Qin, Y.; Li, R.; Zhang, Z.; You, Y.; Wang, X. A Hardware Security Protection Method for Conditional Branches of Embedded Systems. Preprints 2024, 2024041017. https://doi.org/10.20944/preprints202404.1017.v1

Abstract

The branch prediction units (BPUs) generally have security vulnerabilities, which can be used by attackers to obtain the execution status, jump directions, and jump address of conditional branches, and the existing protection methods cannot defend against these attacks. Therefore, this article proposes a hardware security protection method for conditional branches of embedded systems. This method calculates the number of updates to the branch target buffer (BTB). When it exceeds the threshold, BTB is locked to prevent attackers from analyzing the execution status of branches based on the time difference of whether BTB is updated. Moreover, the hybrid physical unclonable function (PUF) circuit is designed to provide confidentiality protection for the jump directions, jump addresses, and their indexes, preventing attackers from stealing these critical data. If these mechanism fails and attackers successfully tamper with conditional branches, this paper proposes a control flow integrity (CFI) protection mechanism based on branch labels to timely detect tampering with instruction codes, jump addresses, and jump directions. The proposed method is implemented and tested on FPGA. The experimental results show that this method can achieve fine-grained security protection for conditional branches, with about 5.4% resource overhead and less than 5.5% performance overhead.

Keywords

embedded system; branch prediction unit; conditional branch; jump address; jump direction

Subject

Computer Science and Mathematics, Security Systems

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