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Underwater Robotics: Challenges and Solutions
Nikolaos Manos,
Ergina Kavallieratou
Posted: 26 March 2025
Comparative Study of Sphere Decoding Algorithm and FCS-MPC for PMSMs in Aircraft Application
Joseph Akinwumi,
Yuan Gao,
Xin Yuan,
Sergio Vazquez,
Harold Ruiz
Posted: 26 March 2025
Optimizing Corrosion Resistance in Biodegradable Materials for Electric Vehicle Components: A Taguchi Method Approach to Enhance Manufacturing Efficiency
Owen Graham,
Mark Billings
Posted: 26 March 2025
Experimental Study on the Luminescence of Leader Channel During the Relaxation Process Before Restrike in a Positive 6-Meters Air Gap Discharge
Yongchao Yang,
Huijun Liang,
Aiguo Tan,
Honghua Liao,
Jianwei Zhong
Posted: 26 March 2025
Performance Analysis of a Multiuser MIMO RIS-Aided Communication System Under Weibull Fading Channels
Ricardo Coelho Ferreira,
Gustavo Fraidenraich,
Felipe A. P. de Figueiredo,
Eduardo R. de Lima
Posted: 25 March 2025
A Microcontroller-Based Integrable Core System for Data Acquisition Devices
Elçin Erdemir,
Selin Öztürk,
Selçuk Çakmak
Posted: 25 March 2025
ML-Driven Memory Management Unit (MMU) in FPGA Architectures
Raj Parikh,
Khushi Parikh
Posted: 25 March 2025
An Anomaly Node Detection Method for WSN Based on Deep Metric Learning with Fusion of Spatial-Temporal Features
Ziheng Wang,
Miao Ye,
Jin Cheng,
Cheng Zhu,
Yong Wang
Posted: 25 March 2025
Advanced Optimization Techniques for Enhancing Bandwidth and Gain in a 1.3 GHz Microstrip Patch Antenna Design for PAL TV Applications
Georgios Giannakopoulos,
Maria Antonnette Perez,
Peter Adegbenro
Posted: 25 March 2025
Design Analysis of a Modified Current Reuse Low Power Wideband Single-Ended CMOS LNA
Farshad Shirani Bidabadi,
Mahalingam Nagarajan,
Thangarasu Bharatha Kumar,
Yeo Kiat Seng
Posted: 25 March 2025
Low-Power Techniques for FPGA and ASIC Design: A Comprehensive Survey
Raj Parikh
Posted: 25 March 2025
A New Common-Mode Choke with Asymmetrical Winding Capable of Attenuating CM and DM Noise for AC to DC Power Converters
Yongwoo Kim,
Kyyoung Kim,
Jaesun Won,
Dokyung Lee,
Jonghae Kim
Posted: 24 March 2025
A Novel Framework for Co-Expansion Planning of Transmission Lines and Energy Storage Devices Considering Unit Commitment
Lucas Santiago Nepomuceno,
Edimar José de Oliveira,
Leonardo Willer de Oliveira,
Arthur Neves de Paula
Posted: 21 March 2025
High Performance Series/Parallel Boost/Buck DC/DC Converter as a Visible Light Communication HB-LED Driver Based on Split Power
Daniel G. Aller,
Diego G. Lamar,
Juan R. Garcia-Mere,
Marta M. Hernando,
Juan Rodriguez,
Javier Sebastian
Posted: 21 March 2025
Band Selective Notch Frequency Technology of EMI Noise Spectrum in DC-DC Switching Converters
Yasunori Kobori,
Yifei Sun,
Haruo Kobayashi
Posted: 21 March 2025
Quantumistor: A Novel Semiconductor Device
Usama Thakur
Posted: 19 March 2025
Non-Intrusive Monitoring and Detection of Mobility Loss in Older Adults Using Binary Sensors
Ioan Susnea,
Emilia Pecheanu,
Adina Cocu,
Adrian Istrate,
Catalin Anghel,
Paul Iacobescu
Posted: 19 March 2025
From Indoor Electroluminescence to Outdoor Daylight Electroluminescence Imaging: A Comprehensive Review of Techniques, Advances, and AI-Driven Perspectives
Rodrigo del Prado Santamaría,
Mahmoud Dhimish,
Gisele Alves dos Reis Benatto,
Thøger Kari,
Peter B. Poulsen,
Sergiu V. Spataru
Posted: 17 March 2025
Black-Box Modeling Approach with PGB Metric for High-Frequency PSRR Prediction in Op-Amps
Yi Zhang,
Xin Yang,
Ruonan Lin,
Tailai Li
Posted: 17 March 2025
AI-Driven JTAG Log Monitoring System for FPGA
Raj Parikh,
Khushi Parikh
The FPGA and ASIC debugging, boundary scan testing, and device coding owe vivid gratitude to JTAG Interfaces (Joint Test Action Group format adhering largely to IEEE 1149.1 standards). In this paper, we experiment with an AI-based method for JTAG log monitoring and performance trend forecasting. Using deep learning models such as LSTMs and Transformers, the system can find deviations from log patterns and predict potential failures in advance. This kind of closed-loop analysis enhances our reliability to unprecedented levels. The system described in this work is made for hybrid cloud deployment, providing secure, scalable, and real-time log analysis software. The paper further discusses the architectural integration of AI into existing JTAG frameworks for FPGAs and RISC-V ASICs, detailing security considerations, implementation challenges, and potential industry applications. This paper is based on a patent: AI-Driven Hybrid Cloud JTAG Log Monitoring System for FPGA Debugging and Failure Prediction (Patent Number 63/771,667).
The FPGA and ASIC debugging, boundary scan testing, and device coding owe vivid gratitude to JTAG Interfaces (Joint Test Action Group format adhering largely to IEEE 1149.1 standards). In this paper, we experiment with an AI-based method for JTAG log monitoring and performance trend forecasting. Using deep learning models such as LSTMs and Transformers, the system can find deviations from log patterns and predict potential failures in advance. This kind of closed-loop analysis enhances our reliability to unprecedented levels. The system described in this work is made for hybrid cloud deployment, providing secure, scalable, and real-time log analysis software. The paper further discusses the architectural integration of AI into existing JTAG frameworks for FPGAs and RISC-V ASICs, detailing security considerations, implementation challenges, and potential industry applications. This paper is based on a patent: AI-Driven Hybrid Cloud JTAG Log Monitoring System for FPGA Debugging and Failure Prediction (Patent Number 63/771,667).
Posted: 17 March 2025
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