This paper presents a new low-voltage versatile mixed-mode filter which uses a multi-ple-input/output differential difference transconductance amplifier (MIMO-DDTA). The multi-ple-input of the DDTA is realized using a multiple-input bulk-driven MOS transistor (MI-BD-MOST) technique to maintain a single differential pair, thereby achieving simple structure with minimal power consumption. In a single topology, the proposed filter can provide five standard filtering functions (low-pass, high-pass, band-pass, band-stop, and all-pass) in four modes: voltage (VM), current (CM), transadmittance (TAM), and transimpedance (TIM). This provides the full capability of a mixed mode filter (i.e., twenty filter functions). Moreover, the VM filter offers high-input and low-output impedances and the CM filter offers high-output impedance; therefore, no buffer circuit is needed. The natural frequency of all filtering functions can be electronically controlled by a setting current. The voltage supply is 0.5 V and for a 4 nA setting current, the power consumption of the filter was 281 nW. The filter is suitable for low-frequency biomedical and sensor applications that require extremely low supply voltages and nano-watt power consumption. For the VM low-pass filter, the dynamic range was 58.23 dB @ 1 % total harmonic distortion. The proposed filter was designed and simulated in the Cadence Virtuoso System Design Platform using the 0.18 µm TSMC CMOS technology.

The chicken poultry business is becoming a crucial sector for our nation's sustainable food supply. To increase the health of chickens in coops and maybe increase the output of chicken meat and eggs, several innovations and inventions have been developed. Therefore, the creation of an automated chicken feeding device might be highly beneficial for the expansion of the poultry sector. This equipment may take the role of a worker in the chicken feeding process, solving the industry's labor shortage and introducing a semi-automatic procedure. The main processor of the automated chicken feeding system is a Raspberry Pi 3 Model B+. The machine consists of five main components: a Raspberry Pi with an amplifier that makes noise to draw the attention of free-range chickens, a Raspberry Pi with a pi camera that counts and detects the chickens, a Raspberry Pi with a servomotor that moves the food from storage to a container, a Raspberry Pi with a load cell that controls the number of feeds to avoid waste on foods, and a Raspberry Pi with a temperature sensor that monitors the food's freshness. This enhances the coop's atmosphere while lowering labor costs, conserving food, and ensuring that the chickens are fed on time. It also regulates the temperature sensor to ensure that the chicken food is fresh and prevents food from becoming polluted by insects and chicken excrement.

Because of the large number of parameters that interact in their function, determining dynamic regime parameters as well as the mode of function of amplifying stages is an extremely complex problem. This paper describes a LabVIEW application for studying the functioning of an ampli-fier in various connections. The user selects the generator's parameters, the type of connection and its parameters, as well as the electric charge characteristics. The application can determine both the stage characteristics and the Bode characteristics. The amplifier's stability zone, as well as its gain and phase, are determined based on these characteristics. An important advantage of this application is that the design of the amplifier stage can be made starting from some param-eters that the amplifier can establish, from which the values of components can be determined. In order to validate the simulation results using the LabVIEW application, a specialized program Multisim was used, as well as experimental measurements using the Electronics Explorer Board. Both Multisim and Electronics Explorer Board can determine Bode characteristics. In both simu-lations and experimental amplifiers, the same schemes with the same transistor was used. The application can be used for educational purposes as well as to design the amplifier's stage to achieve specific parameters.

A wide variety of applications require high peak laser intensity in conjunction with a narrow spectral linewidth. Typically, injection-locked amplifiers have been employed for this purpose, where a continuous wave oscillator is amplified in a secondary external resonant amplifier cavity using a pulsed pump laser. In contrast, here we demonstrate a setup that combines a CW Ti:sapphire oscillator and pulsed amplifier in a single optical cavity, resulting in a compact system. Dichroic beam combination of blue wavelength semiconductor diodes and the green wavelength of a Nd:YAG laser allowed the simultaneous excitation of the Ti:sapphire crystal by both continuous-wave and pulsed pump sources. A linewidth of <2MHz is achieved in continuous wave operation, while the linewidth increases to about 10MHz in the combined CW + pulsed mode with a pulse duration of 73ns. A peak pulse intensity of 0.2kW is achieved, which should enable efficient single-pass second harmonic generation in a nonlinear crystal.

Negative feedback to the back gate of MOS devices available in FD-SOI technologies can be used to improve linearity of operational amplifiers. Two operational amplifiers designed and fabricated in a 22nm FD-SOI technology illustrate this technique, its advantages and limitations.

In this paper, we discuss voltage control method for buck converter operating in continuous conduction mode (CCM) using analog feedback system. The aim of this work is to control the output voltage of a buck converter during the variation in load current. This is obtained using analog feedback made with operational amplifier (Opamp). However, the same technique can be applied to other DC-DC converters (e.g boost, buck-boost, cuk converter, etc) in CCM mode, but for the purpose of analysis buck converter is chosen as an example.

The influence of linear and nonlinear modes of ADC driver on the operational amplifier (Op-Amp), which has different values of maximum output voltage slew rate, on the effective number of bits of ADC is considered. It is shown that the effective number of bits of ADC when op-amps on bipolar transistors with input signal amplitudes exceeding 50-100 mV is determined by the nonlinear modes of its input differential stage.

The zero offset voltage in anti-aliasing low-pass filters (LPF) included at the ADC input has a significant effect on the effective bit rate of the ADC. The article discusses methods for minimizing the systematic component of the zero offset voltage (V_OS) of operational amplifiers (Op-Amp) in the structure of the LPF, due to the degradation of the current gain of the base (b) of bipolar transistors for an extremely common subclass of Op-Amp with one high-impedance node. The methods of matching a high-impedance Op-Amp node and a buffer amplifier with the help of special correcting SCM^p and SCMⁿ multipolars are proposed. Methods of description and formation of the given coefficients of weak current asymmetry of typical Op-Amp functional units (current mirrors, input DS, buffer amplifiers, SRC, etc.) are presented. As an example, the results of computer simulation of GaAs Op-Amp with small V_OS performed on JFET field and p-n-p bipolar transistors are given.

This paper presents a 32 GHz high power amplifier (HPA) with a design strategy to achieve a high-power output with reliable operation for the Ka-band deep space satellite communication in 150 nm GaN HEMT technology. The presented Ka-band HPA employs a cascaded two-stage common source amplifier topology, and the output stage is comprised of an 8-way power combining network in current mode. The interstage matching network is designed with the bandpass configuration utilizing capacitors and transmission lines to provide better stability at the low-frequency regime. The implemented Ka-band HPA achieved a peak power gain of 7.3 dB at 32 GHz and a 3 dB bandwidth was 3.5 GHz between 31.3 and 34.8 GHz. The saturated output power at the peak power added efficiency (PAE) of 19.3% was 38.2 dBm, and the output 1 dB gain compression point (OP1dB) was 27.4 dBm in the measurement. The designed HPA consumes an area of 19.35 mm^2 including RF signal, and DC pads

Recently, hybrid logic circuits based on magnetic tunnel junctions (MTJs) have been widely investigated to realize zero standby power. However, such hybrid CMOS/MTJ logic circuits suffer from a severe sensing reliability due to the limited tunnel magnetoresistance ratio (TMR≤150%) of the MTJ and the large process variation in the deep sub-micrometer technology node. In this paper, a novel differential sensing amplifier (DSA) is proposed, in which two PMOS transistors are added to connect the discharging branches and evaluation branches. Owing to the positive feedback realized by these two added PMOS transistors, it can achieve a large sensing margin. By using an industrial CMOS 40 nm design kit and a physics-based MTJ compact model, hybrid CMOS/MTJ simulations have been performed to demonstrate its functionality and evaluate its performance. Simulation results show that it can achieve a smaller sensing error rate of 9% in comparison with the previously proposed DSAs with the TMR ratio of 100% and process variation of 10%, while maintaining almost the same sensing delay of 74.5 ps and sensing energy of 1.92 fJ/bit.

A new power receiving unit (PRU) is proposed in this paper for the resonant wireless power transfer (WPT), which is characterized by the capability of attracting high power from the power transmitting unit (PTU). The resonant WPT is designed for delivering the electrical power to the PRU attached on an electrical vehicle (EV) chassis 50cm away from a PTU installed on the ground. The proposed PRU uses only the passive elements such as inductors, diodes and the capacitors, which needs no initial power from the EV. It is then applicable for charging a battery to several hundred volts for even a first-time charging battery. At a switching frequency of the resonant WPT in the experiment being 4MHz, the proposed PRU behaves itself as a negative impedance converter (NIC) in the subharmonics of 4MHz. The NIC effect plus the subharmonic oscillation causes an instability current charging the battery connected to the PRU. In this paper, we simulated the PRU and performed the experiment. The experiment demonstrates a battery charging of 150W from 50cm away using three D-mode GaN HEMT transistors via the instability current ramp. The power transfer efficiency (PTE) improved as the power delivered to load (PDL) goes higher. The best power transfer efficiency (PTE) is 65% in the present findings. The simulation analysis shows that the circuit allows itself be used to much higher power transfer when it is implemented with more GaN HEMT transistors connected in parallel. The theoretical derivation of the PRU circuit is also used to support both the experimental and simulation results.

Deep-Brain Stimulation (DBS) is a a highly effective and safe medical treatment that improves the lives of patients with a wide range of neurological and psychiatric deceases, and has been consolidated as a first-line tool in the treatment of these conditionsin the last two decades. Closed Loop Deep-Brain Stimulation (CLDBS) pushes this tool further by automatically adjusting the stimulation parameters to the brain response in real time. In this context, this paper presents a Low-Noise Amplifier (LNA) and a Neurostimulator circuits fabricated in the low-power/low-voltage 65 nm CMOS process from the TSMC, which were designed targeting implantable applications. To achieve the best trade-off between input-referred noise and power consuption, metaheuristic algorithms were employed to determine and optimizes the dimentions of the LNA devices during the design phase. The measurement results showed that the LNA had a gain of 40.6 dB, a 3 dB bandwidth spanning over three decades from 10 Hz to 8.6 kHz, and a power consumption of 6.19 uW. Simulations results indicated an input-referred noise of 4.86 uVrms for the LNA. The circuit of the Neurostimulator is a programmable Howland Current-Pump, whose measurements showed its ability to generate currents with arbitrary shapes ranging from between 325 uA to +318 uA. The simulations showed a quiescent power consumption of 0.13 W with a zero neurostimulation current. The LNA and the Neurostimulator circuits are supplied with 1.2 V voltage and occupy a microdevice area of 145 um x 311 um and 88 um x 89 um, respectively, making them suitable for implantation in applications involving Closed Loop Deep-Brain Stimulation.

The design of a mixed-mode proportional-integral-derivative (PID) controller circuit using current-feedback operational amplifiers (CFOAs) as active components is proposed. With the same circuit topology, the proposed configuration of three CFOAs, four resistors, and two capacitors is capable of performing the PID controller in all four operation modes: namely voltage mode, trans-admittance mode, current mode, and trans-impedance mode. Numerous mathematical analyses are conducted to determine the controller performance under ideal and non-ideal conditions. Additionally, the mixed-mode second-order lowpass filter is suggested, and also used to examine the workability of the proposed mixed-mode PID controller in a feedback control structure. The proposed PID controller is implemented with the commercially available IC-type CFOA AD844, and the simulation results are presented to illustrate the functionality of the controller and its closed-loop control system.

Adaptive Sliceable-Bandwidth Variable Transceivers (S-BVTs) are key enabler for future optical networks. In particular, those based on Discrete MultiTone (DMT) modulation and Direct Detection (DD) can be considered a flexible solution suitable to address the cost efficiency requirement of optical metro networks. In this paper, we propose to use this cost-effective S-BVT option/implementation in optical metro networks adopting switching nodes based on Semiconductor Optical Amplifier (SOA) technology. Bit loading (BL) and power loading (PL) algorithms are applied to the Digital Signal Processing (DSP) modules, to maximize the performance and/or the capacity as well as enhance the flexibility and adaptability of the system. Our analysis considers switching nodes based on SOAs with and without filtering elements and fiber spans of 25 km. We present the results up to 100 km, with and without SOA-based nodes. Firstly, we analyze the adaptive BVT transmission using the Margin Adaptive (MA) BL/PL algorithm at a fixed bit rate of 28 Gb/s. The possibility of controlling the SOAs current is a key factor to face the transmission impairments due to the fiber and the filtering elements. We also analyze the system considering Rate Adaptive (RA) transmission at a fixed target BER of 3.8·10⁻³, showing that a maximum capacity above 34 Gb/s can be achieved for a single span of 25 km. Although the cascading of filtering elements still constitutes a limiting factor, we show that an improvement of the net bit rate performance can be obtained thanks to the combined use of S-BVT and SOA technology at the switching nodes, resulting in a promising approach for designing future optical metro networks.

That how to improve the sensitivity and the detection ability of the Large-caliber sensor is critical to satisfy the requirement of heavy vehicle wear condition monitoring. In this paper, we introduced the LC resonance principle to the design of sensor with large flow channel (7mm). The resonant exciting coil increases the impedance change of the exciting circuit caused by wear particles which magnify the current difference between the two exciting coils and improve the sensitivity of the sensor. The resonant induction coil greatly suppresses the interference signals and magnifies the weak induced electromotive force which is beneficial to enhance the detection ability. In order to boost the detectability for different materials particles, a phase controlled variable-frequency exciting system (PCVFES) was adopted to automatically switch the exciting frequency between 284kHz for ferromagnetic particles and 420KHz for non-ferromagnetic particles. For the weak signal detection, based on the essential characteristic of the signal, we apply a simpler method that modified lock-in amplifier (MLIA) rather than the conventional algorithms (Wavelet transform, EMD). Results show that using these methods the sensitivity and the detection ability of the sensor are significantly improved and the 75μm iron particles and 220μm copper particles were successfully detected which realizes the initial abnormal wear monitoring for the large flow project.

We offered the circuit of a discrete analog filter (DAF) low frequencies of second-order on switchable capacitors, which differs from the known ones in that three capacitors with one terminal are connected to a common bus, and the frequency of the DAF pole depends not only on the ratio of the capacitances of the frequency-setting capacitors, but also on the ratio of resistances two additional resistors in the feedback. This allows at constant values ​​of the capacitances and a fixed switching frequency of electronic switches, control the pole frequency by changing the resistance ratio of additional resistors. Computer simulation of the developed circuit was performed in the Micro-Cap environment. It has been established that the DAF has a transmission coefficient close to minus one at very low frequencies and a transmission coefficient close to zero at higher frequencies.

The most popular schemes of digital potentiometers (DP) and digital-to-analog converters (DAC) are considered. DP and DAC use how elements of parameter adjustment of active RC-filters. The circuits of the DAC on the Kelvin-Varley divider, the Kelvin divider based on the R-2R matrix, and the architecture of the DAC with a segmented circuit are shown. The internal structure of DP an Analog Devices and Intersil company is shown, and also the DP switching circuits in a tunable low-pass filter and a band-pass filter, a programmable inverting amplifier and a voltage regulator are presented.

In this study, the degradation characteristics of radio-frequency (RF) low-noise amplifier (LNA) based on silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) due to total ionizing dose (TID) are investigated. The small-signal equivalent model of a SiGe HBT is utilized to analyze circuit-level performance including the input and the output matching and noise figure (NF). As a target circuit, an LNA with a cascode common-emitter stage with emitter degeneration is studied and the equation of each performance parameter is derived. The RF LNA fabricated using commercial 350 nm SiGe technology was exposed to X-ray irradiation with the total dose up to 3 Mrad (SiO2). The experimental results exhibit that modeled device parameters estimate the degraded circuit performance. In addition, the relative impact of each parameter on the circuit metrics is revealed, which is expected from the derived design equations. The key device parameters for modeling TID-induced circuit degradations include the base resistance, the transconductance, and the base-to-emitter capacitance.

The load cell is an indispensable component of many engineering machinery and industrial automation for measuring and sensing force and torque. This paper describes the design and analysis of the strain gauge load cell, from the conceptional design stage to shape optimization (based on the finite element method (FEM) technique) and calibration, providing ample load capacity with low-cost material (aluminum 6061) and highly accurate force measurement. The amplifier circuit of the half Wheatstone bridge configuration with two strain gauges has been implemented experimentally with an actual load cell prototype. The calibration test was conducted to evaluate the load cell characteristics and derive the governing equation for sensing the unknown load depending on the measured output voltage. The measured sensitivity of the load cell is approximately 15 mV/N and 446.8 µV/V at a maximum applied load of 30 kg. The findings are supported by FEM results and experiments with an acceptable percentage of errors, which revealed an overall error of 6% in the worst situation. Therefore, the proposed load cell meets the design considerations for axial force measurement for the laboratory test bench, which has a light weight of 20 g and a maximum axial force capacity of 300 N with good sensor characteristics.

Functional Near Infrared Spectroscopy (fNIRS) systems for e-health applications usually suffer of poor signal detection mainly due to a low end-to-end signal to noise ratio of the electronics chain. Lock-In Amplifiers (LIA) historically represent a powerful technique helping to improve performances in such circumstances. In this work it has been designed and implemented a digital LIA system, based on a Zynq® Field Programmable Gate Array (FPGA), trying to explore if this technique might improve fNIRS system performances. More broadly, FPGA based solution flexibility has been investigated, with particular emphasis applied to digital filter parameters, needed in the digital LIA, and it has been evaluated its impact on the final signal detection and noise rejection capability. The realized architecture was a mixed solution between VHDL hardware modules and software ones, running within a softcore microprocessor. Experimental results have shown the goodness of the proposed solutions and comparative details among different implementation will be detailed. Finally a key aspect taken into account throughout the design was its modularity, allowing an ease increase of the input channels while avoiding the growth of the design cost of the electronics system.

Retired Electric vehicles (EVs) batteries are reused in second life energy storage applications. However, the overall performance of repurposed energy storage system (ESS) is limited by the unevenness of individual batteries use in it. Therefore, battery grading is required for optimal performance of ESS. Electrochemical impedance spectroscopy (EIS) based evaluation of battery aging is a promising way to grade lithium-ion batteries. However, it is not practical to measure impedance of mass retired batteries due to high complexity and slowness. In this paper, a broadband multi-sine binary signal (MSBS) perturbation integrated with multichannel EIS system is presented to measure impedance spectra for high-speed aging evaluation of lithium-ion batteries or modules. The measurement speed is multi-times higher than conventional EIS with single-channel configuration. The broadband MSBS is validated with reference sinusoidal sweep perturbation and corresponding root-mean-square error (RMSE) analysis is performed. Moreover, the accuracy of the presented multichannel EIS system is validated by impedance spectra measurement of Samsung INR18650-29E batteries and comparing it with those measured with commercial EIS instrument. A chi-squared error under 0.641% is obtained for all 8-channels. Since the non-linearity of battery has significant impact on quality of impedance spectra. Therefore, Kronig-Kramer (KK) transform validation is also performed.

The classification of Trojans in modern analog microcircuits is considered. Using high-speed operational amplifiers (Op-Amps) as an example, the relationship between Op-Amp circuit design and the formation of undesirable states in typical switching circuits is shown. Circuit solutions are proposed to minimize the Trojan states of high-speed Op-Amps. These include limiting the maximum output currents of the input stages of the Op-Amp during the transient process and the use of differentiating transient correction circuits in the Op-Amp.

Short-range Internet of Things (IoT) sensor nodes operating at 2.4 GHz need to provide ubiquitous wireless sensor networks (WSNs) with energy-efficient, wide-range output power (POUT) and fully integrated on a single chip for wireless body area networks (WBANs) and wireless personal area networks (WPANs) using low-power Bluetooth (BLE) and Zigbee standards. The proposed fully integrated transmitter (TX) utilizes a digitally controllable current-mode class-D (CMCD) power amplifier (PA) with a second harmonic distortion (HD2) suppression to reduce VCO pulling in an integrated system while meeting harmonic limit regulations. The CMCD PA is divided into 7-bit slices that can be reconfigured between differential and single-ended topologies. Duty cycle distortion compensation is performed for HD2 suppression, and an HD2 rejection filter and a modified C-L-C low-pass filter (LPF) reduce HD2 further. Implemented in a 28 nm CMOS process, the TX achieves a wide POUT range of from 12.1 to -31 dBm and provides a maximum efficiency of 39.8% while consuming 41.1 mW at 12.1 dBm POUT. The calibrated HD2 level is -82.2 dBc at 9.93 dBm POUT, resulting in a transmitter figure of merit (TX_FoM) of -97.52 dB. Higher order harmonic levels remain below -41.2 dBm even at 12.1 dBm POUT, meeting regulatory requirements.