Data-driven models (DDMs) are extensively used in environmental modeling but face challenges due to limited training data and potential results not adhering to physical laws. To address this challenge, this study developed a process-guided deep learning (PGDL) model, integrating a long short-term memory (LSTM) neural network and a process-based model (PBM), CE-QUAL-W2 (W2), to predict water temperature in a stratified reservoir. The PGDL included an energy constraint term from W2's thermal energy equilibrium into the cost function of the LSTM, besides the mean square error term. In PGDL, parameters were optimized by penalizing deviations from the energy law, ensuring adherence to physical constraints. Compared to LSTM, PGDL demonstrated enhanced satisfaction with the energy balance and superior performance in water temperature prediction. Even with less field data for training, PGDL outperformed both LSTM and calibrated W2 after pre-training with data generated using the uncalibrated W2. Therefore, integration of DDM with a PBM ensured physical consistency in water temperature prediction for complex stratified reservoirs with limited data. Moreover, pre-training the PGDL with PBM proved highly effective in mitigating bias and variance due to insufficient field measurement data.

This paper presents a 612–1152 MHz Injection Locked Frequency Multiplier (ILFM). The proposed ILFM is only used for sending an input signal to the receiver in the I/Q mismatch calibration mode. Using the Phase-Locked Loop (PLL) to calibrate the receiver places a burden on this system due to the extra area required and power consumption. Instead of the PLL, to satisfy high frequency, low jitter, and low area, a Ring Oscillator is proposed. The free-running frequency of the ILFM is automatically digitally calibrated to reflect the frequency of the injected signal from the harmonics of the reference clock. To control the frequency of the ILFM, the load current is digitally tuned with 6-bit digital control signal. The proposed ILFM locks to the target frequency using a digitally controlled Frequency Locked Loop (FLL). This chip is fabricated using 1-poly 6-metal 0.18 µm CMOS and achieve the wide tuning range of 612–1152 MHz. The power consumption is 0.95 mW from a supply voltage of 1.8 V. The measured phase noise of the ILFM is −108 dBc/Hz at a 1 MHz offset.