ARTICLE | doi:10.20944/preprints202102.0212.v1
Subject: Physical Sciences, Acoustics Keywords: Photonic crystal cavity; High Q-factor; loss reduction; SOI
Online: 8 February 2021 (13:25:38 CET)
Increasing the quality factor (Q) of an optical resonator device has been a research focus to be utilized in various applications. Higher Q-factor means light is confined in a longer time which will produce a shaper peak and higher transmission. In this paper, we introduce a novel technique to increase further the Q-factor of a one-dimensional photonic crystal (1D PhC) cavity device by using an end loop-mirror (ELM). The technique utilizes and recycles the light transmission from the conventional 1D PhC cavity design. The design has been proved to work by using the 2.5D FDTD simulation with Lumerical FDTD and MODE softwares. By using the ELM technique, the Q- factor of a 1D PhC design has been shown to have increased up to 79.53 % from the initial Q value without the ELM. This novel design technique can be combined with any high Q-factor and very high Q-factor designs to increase more the Q-factor value of a photonic crystal cavity devices or any other suitable optical resonator devices. The experimental result shows that the device is measurable by adding a Y-branch component to the one-port structure and able to get the high-Q result.
ARTICLE | doi:10.20944/preprints202104.0321.v2
Subject: Physical Sciences, Acoustics Keywords: Photonic compact model; silicon photonic integrated circuit (PIC); photonic crystal cavity refractive index sensor; tunable sensing circuit; photonic layout rules
Online: 26 April 2021 (13:39:58 CEST)
Silicon-based photonic integrated circuit (PIC) is a research focus in producing high-density photonics. One of the potential applications of silicon PIC is the sensing and measurement system. In this work, we use the one-dimensional photonic crystal (1D-PhC) cavity design which and utilize it at the PIC level design. The 1D PhC design used as the compact model has the same characteristics as experimentally demonstrated in previous works. The compact model is made from the S-parameter extraction of the 1D-PhC device which is done by using Lumerical FDTD software. The PIC design integrates the 1D-PhC device as a sensing component with a PN-phase shifter (PN-PS) to function as a refractive index (RI) sensor calibration or tuning circuit. A custom design of PN-PS device is used by simulating and extracting the bias voltage-effective index (bias-Neff) data by using Lumerical DEVICE and MODE into the circuit simulator. The circuit-level simulation is done by using Lumerical Interconnect software. Finally, we show the GDSII layout design of the 1D-PhC based photonic sensor calibration circuit with an analysis of generic silicon PIC design rules. The designed PIC is applicable for the bio-sensing applications and photonic SOC component. This work also shows the promise of PIC design approach for further PIC development.