ARTICLE | doi:10.20944/preprints201806.0275.v2
Subject: Engineering, Electrical & Electronic Engineering Keywords: near threshold computing (NTC); dual-supply; static random access memory (SRAM); reliability; write aggregation buffer
Online: 5 September 2018 (05:45:16 CEST)
Energy-efficient microprocessors are essential for a wide range of applications. While near-threshold computing is a promising technique to improve energy efficiency, optimal supply demands from logic core and on-chip memory are conflicting. In this paper, we perform static reliability analysis of 6T SRAM and discover the variance among different sizing configuration and asymmetric minimum voltage requirements between read and write operations. We leverage this asymmetric property in near-threshold processors equipped with voltage boosting capability by proposing an opportunistic dual-supply switching scheme with a write aggregation buffer. Our results show that proposed technique improves energy efficiency by more than 21.45% with approximate 10.19% performance speed-up.