The performance of OpenFOAM in strong scaling tests on HPC systems with AMD EPYC processors exhibits a pronounced superlinear speedup. Simple test cases show superlinear speedups of over 300%, which significantly impacts the efficient use of computing resources. With the last generation of HPC architectures, a superlinear speedup of about 10% to 20% was well expected and accepted by CFD users. The measured superlinear speedup is much more pronounced and withstands the communication overhead to even larger scales. A detailed performance analysis of OpenFOAM follows, employing various High-Performance Computing (HPC) architectures, including AMD, ARM and Intel systems. The performance metric FVOPS (Finite VOlumes solved Per Second) is introduced to compare the performance of Computational Fluid Dynamics (CFD) applications when varying the grid size, as occurs in a strong scaling test. The achievable FVOPS depends on various factors, including the simulation type, boundary conditions, and especially the grid size of a use case. Analysing FVOPS on a single node level with varying grid size shows a significant difference in performance and cache utilization, which explains the large superlinear speedups seen in the strong scaling tests. Furthermore, FVOPS can be used as a simple benchmark to determine the optimal number of grid elements per rank to simulate a given use case at peak efficiency on a given platform, resulting in time, energy, and cost savings. The FVOPS metric also facilitates the direct comparison between different HPC architectures. The tests using AMD, ARM, and Intel processors show a peak in performance when employing around 10,000 grid elements per core. The presence of a large L3 cache on AMD processors is particularly advantageous, as indicated by L3 cache miss rates observed on AMD EPYC processors. Our results suggest that future HPC architectures with larger caches and higher memory bandwidth would benefit the CFD community.

Applications in high-performance computing (HPC) may not use all available computational resources, leaving some of them underutilized. By co-scheduling, i.e. running more than one application on the same computational node, it is possible to improve resource utilization and overall throughput. Some applications may have conflicting requirements on resources and co-scheduling may cause performance degradation, so it is important to take it into account in scheduling decisions. In this paper, we formalized co-scheduling problem and proposed multiple scheduling strategies to solve it: an optimal strategy, an online strategy and heuristic strategies. These strategies vary in terms of the optimality of the solution they produce and a priori information about the system they require. We showed theoretically that the online strategy provides schedules with a competitive ratio that has a constant upper limit. This allowed us to solve the co-scheduling problem using heuristic strategies that approximate this online strategy. Numerical simulations showed how heuristic strategies compare to the optimal strategy for different input systems. We proposed a method for measuring input parameters of the model in practice and evaluated this method on HPC benchmark applications. We showed high accuracy of measurement method, which allows to apply proposed scheduling strategies in scheduler implementation.

RAxML-NG is a new phylogentic inference tool that replaces the widely-used RAxML and ExaMLtree inference codes. Compared to its predecessors, RAxML-NG offers improvements in accur-acy, flexibility, speed, scalability, and user-friendliness. In this chapter, we provide practicalrecommendations for the most common use cases of RAxML-NG: tree inference, branch supportestimation via non-parametric bootstrapping, and parameter optimization on a fixed tree topo-logy. We also describe best practices for achieving optimal performance with RAxML-NG, inparticular, with respect to parallel tree inferences on computer clusters and supercomputers. AsRAxML-NG is continuously updated, the most up-to-date version of the tutorial described inthis chapter is available online at: https://cme.h-its.org/exelixis/raxml-ng/tutorial .

Full waveform (FW) LiDAR holds great potential for retrieving vegetation structure parameters at a high level of detail, but this prospect is constrained by practical factors such as lack of available handy processing tools and technical intricacy of waveform processing. This study introduces a new product, named the Hyper Point Cloud (HPC) derived from FW LiDAR data, and explore its potential applications such as tree crown delineation using the HPC-based intensity and percentile height (PH) surfaces, which show a promising solution to the constraints of using FW LiDAR data. Results of the HPC present a new direction to handle FW LiDAR data and offer prospects for studying the mid-story and understory of vegetation with high point density (~ 182 points/m2). The intensity-derived digital surface model (DSM) generated from the HPC shows that the ground region has larger maximum intensity (MAXI) and mean intensity (MI) than the vegetation region while having smaller total intensity (TI) and number of intensities (NI) at the given grid cell. Our analysis of intensity distribution contours at individual tree level exhibit similar patterns, indicating that the MAXI and MI are decreasing from the tree crown center to tree boundary while a rising trend is observed for TI and NI. These intensity variable contours provide a theoretical justification for using HPC-based intensity surfaces to segment tree crowns and exploit their potential for extracting tree attributes. The HPC-based intensity surfaces and the HPC-based PH Canopy Height Models (CHM) demonstrate promising tree segmentation results comparable to the LiDAR derived CHM for estimating tree attributes such as tree locations, crown widths and tree heights. We envision that products such as the HPC and the HPC-based intensity and height surfaces introduced in this study can open new perspectives to use FW LiDAR data and alleviate the technical barrier of exploring FW LiDAR data for detailed vegetation structure characterization.

Energy consumption of processors and memories is quickly becoming a limiting factor in the deployment of large computing systems. For this reason it is important to understand the energy performance of these processors and to study strategies allowing to use them in the most efficient way. In this work we focus on computing and energy performance of the Knights Landing Xeon Phi, the latest Intel many-core architecture processor for HPC applications. We consider the 64-core Xeon Phi 7230, and profile its performance and energy efficiency using both its on-chip MCDRAM and the off-chip DDR4 memory as the main storage for application data. As a benchmark application we use a Lattice Boltzmann code heavily optimized for this architecture, and implemented using several different arrangements of the application data in memory (data-layouts, in short). We also assess the dependence of energy consumption on data-layouts, memory configurations (DDR4 or MCDRAM), and number of threads per core. We finally consider possible trade-offs between computing performance and energy efficiency, tuning the clock frequency of the processor using the Dynamic Voltage and Frequency Scaling (DVFS) technique.

Power and energy efficiency are among the most crucial requirements in high-performance and other computing platforms. This work examines through extensive experimentation methods and procedures suitable for assessing the power and energy efficiency of fundamental hardware building blocks inside a typical high-performance CPU, focusing on the dynamic branch predictor (DBP). The investigation relies on the Running Average Power Limit (RAPL) interface from Intel, a software tool for credibly reporting the power and energy based on instrumentation inside the CPU. We use well-known microbenchmarks under various run conditions to explore potential pitfalls and to develop precautions to raise the precision of the measurements obtained from RAPL for more reliable power estimation. The authors discuss the factors that affect measurements and share the difficulties encountered and the lessons learned.

Recently, we isolated and characterized a new pool of mesenchymal stem cells- HPC (Hoof Progenitor Cells), which reside in the coronary corium of equine hooves. We hypothesize, that due to their location, HPC may be involved in the pathogenesis of laminitis, and could possibly be utilized in its treatment. The aim of this study was to compare the newly described HPC to a well-established cell pool-ASC (Adipose Stem Cells). The two cell populations were maintained either in standard culture conditions or under a hyperinsulinemic milieu as hyperinsulinemia is often observed alongside laminitis. Cell cycle dynamics, mitochondrial membrane potential and oxidative stress were analyzed with microcapillary cytometry. Furthermore, the expression of key markers of mitochondrial metabolism, oxidative stress, apoptosis, immunomodulation and insulin signalling were analyzed with the RT-qPCR method. Additionally, a selected panel of miRNA was analyzed with the RT-qPCR method. In standard culture conditions, ASC exhibit higher proliferation than HPC while in hyperinsulinemia a shift towards S phase was observed in both populations. As for the mitochondrial membrane potential, in standard culture conditions, HPC was characterized by a higher percent of live cells. Hyperinsulinemia did not strongly affect the mitochondrial membrane potential of the analyzed populations. Our findings indicate that HPC are characterized by higher activity in terms of mitochondrial dynamics, mitophagy, and mitochondrial biogenesis under standard culture conditions. Yet in both populations, a diminished mitochondrial dynamic and metabolism was observed in hyperinsulinemia. The analysis of oxidative stress revealed, that HPC might possess somewhat higher resistance towards oxidative stress than ASC. Minimal change was observed in the expression of key markers of apoptosis in ASC and HPC under hyperinsulinemia. The analysis of key immunomodulatory markers indicated that HPC may help the cytokine storm for a more effective phenotype change to an immunosuppressing pool of cells with better migratory and healing abilities under hyperinsulinemia than ASC. As for insulin signalling, the obtained data suggests that HPC might be more resistant to hyperinsulinemia and may have greater therapeutic potential in reducing laminitis. Obtained results demonstrated that HPC possesses better potential to modulate the PTEN-AKT pathway by miR-21 and reverse high glucose and high insulin-induced insulin resistance. Taken together, the obtained results indicate that HPC may be a very promising cell pool with therapeutic potential in laminitis treatment, and could be more effective than ASC.

Top-down models are defined by hardware architects to provide information on the utilization of the different hardware components. The target is to isolate the users from the complexity of the hardware architecture while giving them insight into how efficiently the code is using the resources. In this paper, we explore the applicability of 4 top-down models defined for different hardware architectures powering state-of-the-art HPC clusters (Intel Skylake, Fujitsu A64FX, IBM Power9, and Huawei Kunpeng 920) and propose a model for AMD Zen 2. We study a parallel CFD code used for scientific production to compare these 5 Top-Down models. We evaluate the level of insight achieved, the clarity of the information, the ease of use, and the conclusions that each one allows us to reach.

The Industrial Internet of things (IIoT) enabled smart system has entered into a golden era of rapid technology growth. IIoT is a concept to make every system interrelated such that they are able to collect and transfer data over a wireless network without human intervention. In this paper, we discuss the development of an IoT enabled system to monitor the vibration signature of equipment as part of prognosis and availability management system (P&AM) that serves to prevent unplanned operation downtime and catastrophic failure of a whole system. In order to simply the complexity of processing video content and performing inference, the Intel OpenVINO platform was selected because of it’s simplicity, portability across Intel AI processors, performance and comprehensiveness of it’s analytical and diagnostics capabilities that can be tested in Intel’s DevCloud. The IIoT system consists of a High Performance Computing (HPC) platform based on Intel’s Xeon processors and Movidius AI accelerator, Intel’s OpenVINO toolkit for AI, a Regul high performance programmable controller capturing vibration data through sensors and a low-latency network connection. Notifications of anomalies are sent to a smartphone. This paper reveals an approach for the features extraction and selection, known as feature engineering, of the equipment component we want to protect. Feature engineering is the first step for the P&AM of these components and extends to the whole system. The broader aim of this paper is to help technical leaders at the exploring or experimenting stages of their AI framework to learn the concepts of implementing algorithms using datasets that have real value to their companies. Datasets generated and referred to in this paper were generated by simulation under various material failure scenarios.

With the existence of several programming languages such as C/C++, Java, C#, LISP, Prolog, Python, Simula, F#, Go, Haskell, Scala, Ruby, Dart, Swift, Groovy etc. and diverse paradigms like structured, object-oriented, list, aspect-oriented, service-oriented, web, mobile and logic programming, there is a need to perform an exhaustive comparative analysis of diverse compilers and environments before making a choice of implementation technology in software engineering. Optimization of compilers helps to reduce execution time by making use of high speed processor registers, thereby, eliminating redundant computation. This paper reports some series of performance analysis done with some popular programming languages including Java, C++, Python and PHP. Programs involving recursive and iterative functions like factorial of large numbers and binary search of large arrays were run on the various platforms with the execution time recorded in milliseconds and represented in a chart. This can aid in making a selection of the appropriate language to use for a given application domain.

Big data has revolutionised science and technology leading to the transformation of our societies. High Performance Computing (HPC) provides the necessary computational power for big data analysis using artificial intelligence and methods. Traditionally HPC and big data had focused on different problem domains and had grown into two different ecosystems. Efforts have been underway for the last few years on bringing the best of both paradigms into HPC and big converged architectures. Designing HPC and big data converged systems is a hard task requiring careful placement of data, analytics, and other computational tasks such that the desired performance is achieved with the least amount of resources. Energy efficiency has become the biggest hurdle in the realisation of HPC, big data, and converged systems capable of delivering exascale and beyond performance. Data locality is a key parameter of HPDA system design as moving even a byte costs heavily both in time and energy with an increase in the size of the system. Performance in terms of time and energy are the most important factors for users, particularly energy, due to it being the major hurdle in high performance system design and the increasing focus on green energy systems due to environmental sustainability. Data locality is a broad term that encapsulates different aspects including bringing computations to data, minimizing data movement by efficient exploitation of cache hierarchies, reducing intra- and inter-node communications, locality-aware process and thread mapping, and in-situ and in-transit data analysis. This paper provides an extensive review of the cutting-edge on data locality in HPC, big data, and converged systems. We review the literature on data locality in HPC, big data, and converged environments and discuss challenges, opportunities, and future directions. Subsequently, using the knowledge gained from this extensive review, we propose a system architecture for future HPC and big data converged systems. To the best of our knowledge, there is no such review on data locality in converged HPC and big data systems.

A general procedure is described, to generate material parameter sets to simulate fire propagation in horizontal cable tray installations. Cone Calorimeter test data is processed in an inverse modelling approach. Here, parameter sets are generated procedurally and serve as input for simulations conducted with the Fire Dynamics Simulator (FDS). The simulation responses are compared with the experimental data and ranked based on their fitness. The best fitness was found for a test condition of \SI{50}{\kilo\watt\per\meter^2}. Low flux conditions \SI{25}{\kilo\watt\per\meter^2} and less exhibited difficulties to be simulated accurately. As a validation step, the best parameter sets are then utilised to simulate fire propagation within a horizontal cable tray installation and are compared with experimental data. It is important to note, the inverse modelling process is focused on the Cone Calorimeter and not aware of the actual validation step. Despite this handicap, the general features in the fire development can be reproduced, however not exact. The fire in the tray simulation extinguishes earlier and the total energy release is slightly higher as compared to the experiment. The responses of the material parameter sets are briefly compared with a selection of state of the art procedures.