Evaluation and Improvement of a Transformerless High-Efficiency DC–DC Converter for Renewable Energy Applications Employing a Fuzzy Logic Controller

This article discusses a transformer-free, high-efficiency DC–DC converter besides renewable energy applications. The traditional buck–boost, classic Zeta, Sepic, and Cuk converter does have the benefits of a simple design, low cost, as well as the capacity to execute voltage step-up and step-down. Conversely, because of the detrimental consequences of the parasitic constraints of the device, the voltage conversion gain of the traditional DC–DC converter is much more restricted, and the efficiency is also significantly smaller, whereas this proposed converter does have a higher voltage gain and efficiency because it is used in a single power switch, resulting in reduced switching losses and voltage stress. The said converter's design is very simple, which simplifies the operation control and reduces switching and conduction losses, leading to an efficiency of 97.4%. This converter seems to have the same capabilities as the Zeta converter, including continuous desired output current and desired buck–boost operation. Such an article offers the operation principle and steady evaluation, as well as a comparison with other existing high step-up configurations. The proposed converter employs a fuzzy logic controller, which improves the voltage level as well as reduces the time taken to set the voltage output of a conventional PI and ANN controller, especially in comparison to the FLC controller. For deployment, experimental result and MATLAB/Simulink have been used, and the modeling results indicate that the proposed controller performance has improved. The proposed approach delivers better performance with an output power of 248 W and an efficiency of 97.4%, which is comparatively better than the other converters.


List of symbols S
Semiconductor switch The equivalent L 1 L 2 & L 3 inductor resistance (ohm) r C1 , r C2 , r C3 , r C0 The equivalent C 1 , C 2 , C 3 , C 0 capacitor resistance (ohm) P rDS The switch's condition is loss

P Sw
Switching loss of the presented converter P Switch Total loss of the switch P Loss Presented converter total loss g Efficiency (%) DV C1 Capacitor voltage ripples (V) s L The normalized time constant of an inductor (s) FLC Fuzzy logic controller ANN Artificial neural network e, de, du Error, change in error, control output R Load Resistive load K i Integral gain e ss Steady-state error T P Peak time

Introduction
The two most important energy sources seem to be fuel cells as well as photovoltaic. The voltage levels of these sources, even so, have become too small and uncertain, differing with weather patterns including solar irradiation and temperature. As a result, photovoltaic as well as fuel cell applications requires high voltage gain converters [1,2]. The inherent voltage levels of such renewable energy sources were also considerably lower and uncertain. As a result, a high boost-up converter requires maintaining and boosting the low voltage renewable input energy of the source to convert higher voltage into delivering the grid is illustrated in Fig. 1. The conventional boost converter has been commonly used due to its low hardware complexity, compact configuration, and relatively cheap. Even so, this voltage gain is insufficient. While the output voltage of a standard boost converter may theoretically reach infinite as the duty ratio reaches one, the actual voltage gain is constrained by parasitic elements and gradually decreases as the duty ratio reaches one. Most of all, the main switch must limit a rising output voltage, necessitating the use of the main switch with a rising on-resistance, which tends to increase the conduction loss. Furthermore, the diode of a conventional boost converter must also obstruct the large output voltage, creating a severe major issue with reverse recovery current as well as conduction loss [3][4][5][6]. These several improvements besides DC/DC converters are compared to provide higher voltage conversion ratios. Switched-capacitor converters are such an approach to increase the voltage gain in this case. Analyzed, the authors developed a few design guidelines helpful for achieving various switched capacitor converters. Therefore, many modular multilevel inverters depending on a switched capacitor cell theory have been described, with a soft-switched scheme that is used to reduce electromagnetic interference and switching losses. The switched capacitor methodology, on the other hand, causes the switch to suffer from serious current transient and large conduction losses. Besides that, numerous switched capacitor cells have been necessary to accomplish the incredibly large step-up conversion, increasing the circuit complexity [7][8][9].
Combined inductor-based converters are also another option for implementing high boost-up gain, so the combined inductor's turn ratio could be used as further control independence to strengthen the voltage gain. Even so, when using single-phase single-stage coupled inductorbased converters, the current ripple of the input has been substantially higher. That may reduce the useful life of the insight electrolytic capacitor. However, this combined inductor converter would have had some issues with leakage inductance as well as pulsating input current [10][11][12]. In [13], high voltage converters have been introduced in transformerless buck-boost converters. That although the converters should not use coupling inductors. The converter's switches and diodes had too much difficulty and stress. Thus, the converter's losses are considerable. A high step-up converter without transformers has been addressed in [14], one main switch and capacitor technology would be used for such converters. This converter's main objective is to improve the voltage gain, and the easiest way is to cascade the boost converter. In such a converter, only one disadvandage is that increased the switching voltage stress of the converter.
The transformerless high voltage converters were also introduced in [15], the converter has low voltage stress. The losses and high efficiency can thus be lowered. Transformerless cell-based converters were also displayed in [16], and the converter has certain benefits, including greater voltage gain, lower power diodes, and switches stresses, minimal ripples, and greater efficiency. The alternating transformer conversion method has been described in [17], Clamps, both active and passive, are frequently utilized in those other converter topologies to lessen the burden on the switch voltage. Additional active clamping and passive clamping circuit designs were also conversely embraced to decrease the spike voltages around the active switches. A Zeta dc to dc converter of the active clamp has been displayed in [18] for zero voltage switching (ZVS). To minimize the transition, the Flyback and Zeta converters in the presented converter use the same active switches in conveys. Banaei and Bonab [19] proposes a transformerless buck-boost converter, and the converter's voltage gain is three times that of a traditional buck-boost converter.
A buck-boost converter, incorporating KY as well as a buck converter, was introduced in [20] transformerless, to lower the power switches number to two. However, all buck-boost converters achieve a high voltage gain of two. Besides, high step converters are constructed using a KY converter. The biggest limitation of the KY converter is that there have been sudden charges of some condensers in some working modes. As a consequence, current stresses have also worsened on diodes, switches, and condensers. There are some problems with implementing this major issue. In [21], this same output voltage ripple decrease has been achieved by using two Zeta DC/DC converters. However, the control operation of the Zeta converter is highly complex. A high-step converter was indeed addressed at [22] with the connected inductor. Such a converter has one primary switch as well as the stress has been lowered through the main switch. However, the voltage stress of the converter's three diodes would be high. The leakage power could be reused in this converter.
A high-step converter was also described in [23]. These same comprehensive study boost converters, as well as the voltage-double module, have been used for one such converter as well as the conversion has two main switches. High DC-DC converters are provided in [24], and the version was released. Two main switches and highly stressful diodes and switching are used for this converter. The buck-boost converters were indeed described in [25,26] transformerless. Three switches are located on this converter. The switch's voltage stress is equal to the converter's output voltage in this converter. The switching and conduction losses of the converter are extremely significant. A DC-DC converter was incorporated in [27] with a transformerless buck-boost converter. There is a higher voltage gain from this converter than from the buck-boost, cuk, spice, and Zeta converters, and only one active switch is used. The converter has three inducers and displays a pulse current of the input or output. The switch and converter diode are stressful. The converter's losses are thus high.
In spite of having many benefits, the voltage transfer gain ratio of these converters is not optimal. The serious issue of diode reverse recovery is one of the major limitations of these converters. In addition, these converters have delivered high conduction losses because of large duty ratios. A SEPIC transformer with a continuous input current was also addressed in [30], which is a transformerless high stage. Compared with construction, such converters benefit from the decreased number of objects and low-voltage pressure throughout the switches. Even so, the control complexity is increased by using two switches in the configuration.
It is suggested in this paper that a unique transformerless buck-boost converter be developed on the basis of the Zeta converter. The gain of the voltage converter is greater than that of the traditional buck-boost converter, as well as that of the Zeta, Cuk, and Sepic converters. The suggested converter topology is easy, and as a result, the converter function control is also easy. There is only one primary switch on this converter. Due to the fact that the primary switches and diode stress levels are lower than the output's voltage, the switching loss becomes minimal, and increased efficiency also this converter. Buck-boost converters are utilized in a variety of applications, including led drivers, fuel cells, and electronic components in automobiles. An explanation analysis of the modes is provided, and experimental data are presented to verify that the converter is operating properly. This paper is discussed as: In Sect. 2, we detailed the presented converter buck and boost functions, the operation modes of Mode I, Mode II, and Mode III, the steady-state condition of the CCM and DCM modes, voltage gain, inductor voltage and current values, BCM, efficiency, voltage stress, and calculated inductors and capacitors values. In Sect. 3, we detailed the design of the FLC and membership functions. In Sect. 4, we discussed the proposed converter experimental and simulation results of both boost and buck modes, and these converter results, such as efficiency and voltage gain, compared with another converter. The conventional PI controller is compared with this proposed converter. In Sect. 5, the proposed converter concluding remarks of the article.

The Proposed Converter
The topology of the converter's circuit is depicted in Fig. 2 (topology). The converter is made up of a single primary (S) switch andalso includes two (D 1 , D 2 ) diodes, three (L 1 , The following criteria were taken into consideration in order to simplify the analysis of the new buck-boost converter.
a. As a result, the voltages of the capacitors may be considered constant since all capacitors are of sufficient size. b. Semiconductor components, such as diodes and switches, are the best choice for this.
The suggested converter works in both continuous and discontinuous conduction modes. The CCM has two modes. Following is a detailed examination of the CCM converter.

Mode of Continuous Conduction (CCM)
Mode 1 t o , t 1 ], the primary (S) Switch is ON and the diodes D 1 and D 2 are OFF throughout this time period. Figure 3(i) shows the current flow direction. A magnetized inductor is L 1 followed by L 2 and L 3 . Capacitors C 2 and C 3 are charged, while C 1 is discharged. As a result, the appropriate formulas are as follows: Fig. 3(ii), the current flow direction is presented. Switch S is switched OFF throughout this period. The D 1 and D 2 diodes are switched on. The L 1 , L 2, and L 3 inductors are demagnetized. The inductor L 1 charges the capacitor C 1 . The C 2 and C 3 capacitors discharge. Inductor voltages are derived as follows:

Gain in Voltage
In the case of L 1 and L 2 , we can use the volt-sec balancing concept and use Eqs. (1), (2), (4), and (5), we obtain The voltage of C 1 , C 2 , and C 3 (V C1 , V C2 , and V C3 ) may be obtained by using (5), (7) and (8) as follows: Using volt seconds balance L 3 and (9) and (10), get the voltages transfer gain (M CCM ): As shown in (12), the suggested converter's voltages gain is double that of the Zeta converter. As a result, the converter's voltage gain is greater than the Zeta converter's. Figure 4 illustrates some of the suggested converter's main waveforms in CCM.
As illustrated in Fig. 5, the suggested converter, Zeta and traditional buck-boost converter show the gain of the voltage. As can be observed, the suggested converter has a greater voltages transfer gain than the other converters.

Current Calculation
The average currents of the inductor I L2 , I L3 of respective inductors L 2 and L 3 and the average currents move to the across capacitors C 2 , C 3 (I C2,on , I C3,on ) during the switch ON period time in mode 1, and the following expressions are obtained, Then, the mean current I C1,off of capacitor C 1 in mode 2, the following expressions are obtained, Here, I C2, off is the mean current of C 2 and I C3, off is the mean current of C 3 in mode 2 on the principle of ampere sec balance on C 1 , C 2 , C 3 ; the expression framed is, By applying the expressions (12), (13), (14), (15) in expression (16), the mean current I C2, on I C3, one of capacitors C 2 , C 3, and the current I L2 of the inductor L 2 are framed as below, Concerning the above-said expression (17), the mean current I C1, one of the corresponding capacitor C 1 is framed as below, About the expression (18) and Fig. 3(ii), I L1 , which is the mean current of the inductor L 1 , is framed as, Regarding Fig. 3(i), (ii), I S which is the stress of the current across the switch (S), and I D1 , I D2 that is the current stress across D 1 , D 2 diodes are framed as below, Rð1 À DÞ 2 ð21Þ Rð1 À DÞ 2 ð22Þ Figure 6 depicts the presented converter's, and [19] converter's switch current stress curves. As shown, the suggested converter's current stress is less than that of the converter in [19], implying that the given converter's conduction loss will be minimal.

Mode of Discontinue Conduction (DCM)
DCM consists of three modes. DCM's mode 1 is identical to CCM's Mode 1. In Mode 2, the diodes' currents decrease. In Mode 3, the diode current decreases to zero. The diodes are switched off in this mode. The circuit equivalent is illustrated in Fig. 7. The voltage across inductors L 1 , L 2 , and L 3 is zero in this condition. About Fig. 3(ii), the summation of the mean of the diode currents can be achieved with the following expression.
The mean diode currents represented as (I D1,av , I D2,av ) of D 1 , D 2 can be found by The total of the average diode D 1 and D 2 during one switching time may be calculated as follows, according to By applying an inductor volt-sec balancing L 1 , L 2 , and L 3 duty ratio to Mode 2 in DCM (D m2 ), the following expressions are obtained: The voltage gain ðM DCM Þ in discontinuous mode can be obtained using (23)- (27) and does M DCM is provided as (s L ), which is the time constant for the normalized inductor, is obtained as

Analysis of Boundary Condition Mode (BCM)
The gain of the voltage in CCM and DCM becomes uniform during the working of the presented converter in BCM. The time constant (s L ) can be obtained using Eqs. (11) and (28), and it is represented as (s L ), which is the time constant curve for the boundary normalized inductor indicated in Fig. 9. The presented converter operates in continuous conduction mode when s b is less compared to s L . Figure 10 illustrates the proposed and ZETA converters' boundary normalized inductor time constant curves. The presented converter plays a significant role in enhancing the overall performance of the system. The efficiency of this converter is highly maximum, which is validly expounded in the subsequent part. As the switching losses are minimized by this converter, it delivers optimal output power with less duty cycle, which in turn improvises the efficiency of the converter. The parasitic resistances listed below can be used to evaluate the efficiency of the converter under consideration. P DS, P SW, P Switch , P D1,2, P C1,2,3,0, P L1,2,3, P loss . The capacitor's inductor's voltage ripples are not considered.
(P DS ) , which is the switch (S) condition loss, is given by, Fig. 7 The presented converter, mode 3 circuit in DCM Fig. 8 The presented converter's illustrated waveforms in the DCM Fig. 9 The presented converter duty cycle versus boundary constant inductor time  Evaluation and Improvement of a Transformerless High-Efficiency DC-DC Converter for Renewable… 297 (P SW ), which is the switch losses of the presented converter's, is given by, (P Switch ) which is the switch (S) the total loss is given by, (P D1,2 ), which is the loss of the diode D 1 and Diode D2, is provided as (P C1,2,3,0, ),the capacitor loss of C 1 ,C 2 , C 3 ,C o is obtained by, (P L1,2,3 ),the inductor loss of (L 1 , L 2 , L 3 ) is presented as, The presented converter's total loss (P loss ) is obtained as, g, which is the proposed converter of efficiency given by

Analysis of Voltage Stress
The most important criterion in the circuit is the stress of the voltage. Here, the switch (S) and diodes, the stress of the voltage is calculated as given below, According to (39) and (40), the diodes' and switch's voltage stresses are well below the output voltage. The suggested converter's normalized voltage stress is compared to the ZETA converter in Fig. 11. Because the ZETA converter's normalized voltage stress is greater than that of the presented converter, it is possible to choose a switch with a low conduction loss.

Capacitors Across the Voltage Ripple Calculation
A voltage ripple is formed by C 1 (DV C1 ; DV C1;ESR ) from the current that is in equivalent series resistance (ESR) which is shown in Fig. 12. Another voltage ripple (DV C1;cap ) is formed by C 1 due to the discharging and charging mode of the capacitor. The capacitors C 2 , C 3 of voltage and current waveform are shown in Fig. 13.  Thus, the capacitor C 1 voltage ripple can be framed as given below, DV C1;ESR is given by, where Capacitor C 1 's dissipation factor tan d C1 . DV C1;cap is given by, Likewise, DV C 2;3 À Á which is a capacitor C 2 and C 3 voltage ripple is given by,

Inductors and Capacitors Design
In CCM, the theoretical L 1 , L 2 , L 3 inductors derived values as follows: In CCM, the theoretical C 1 , C 2, C 3 , C o capacitors derived values as follows:

The Fuzzy Logic Controller (FLC) Algorithm
FLC is a technique that is utilized in nonlinear systems. It derives the ideas of various experts and uses mathematical principles to resolve various complex issues with much simpler calculations. FLC completely depends upon linguistic control variables. FLC is similar to human thinking, and thus, it reduces the gap between mathematical calculation and human thinking. FLC has three steps. The first step is fuzzification, followed by fuzzy inference and finally by defuzzification.
In the case of the PI controller, there are no orderly schematic procedures for the design of an FLC. However, the common schematic diagram of the FLC is shown in Fig. 14 error (e) is obtained for all loops which are provided as input for FLC to achieve the control output (u) [31]. By altering the duty cycle, the voltage of the output of a transformerless high-efficiency DC to DC converter is controlled. When compared with output voltage values with reference voltage values, this time is obtained by the error value. Here, the voltage of reference is given as r(k), and the obtained voltage of the output is given as y(k). From the following Eq. (51), the error voltage can be calculated.
eðkÞ ¼ rðkÞ À yðkÞ ð 51Þ From the below equation, the change in the error voltage can be calculated In the first step, when e k ð Þ is positive ('?') and De k ð Þ is considered negative '-,' the error becomes '?' and lowers down to zero. To reduce the error, Du is made positive. The error becomes negative and goes on decreasing when the (k) is '-' and De k ð Þ is made '?'. Du is applied to stop the error from further decreasing from negative. [32

The Internal Structure of the Fuzzy Controller
Here, Mamdani-type fuzzy inference has been applied. The simulation circuit of the entire FLC is given in Fig. 15. The two inputs (e, de) and output (du) are provided in the FLC as illustrated in Fig. 15a-c. (iii) Fig. 19 In Boost mode (i) three inductor currents I L1 , I L2 , I L3 , (ii) two diode voltages V d1 , V d2 . and two diode currents I d1 , I d2 , (iii) C 1 = Co, C 2 = C 3 capacitors across the voltage, (iv) voltage across the switch For the provided inputs, the membership functions that are designed are illustrated in Fig. 16a, and Fig. 16b as PWM oscillations are suppressed by the trapezoidal function Z, it is used here and the output is shown in Fig. 16c Upon experience, the rules are framed for the fuzzy system. The rules are represented in symmetric matrix skew form in Table 1. It has twenty-five rules derived from twenty-five input combinations.
Some of the fuzzy rules are explained below, When de and e are PB, then du is PB, When de is PL and e is PB, then du is PB, When de is NB and e is PB, then du is Z. When de is NB and e is PL, then du is NL. When de is NB and e is Z, then du is NL.
One more rule is added to improve the transient response.
The rule is given below.
When e is PB, then du is PB.  The proposed FLC-based converter error (u), change in error (de) based on various combinations of inputs, and the graphical output (du) are shown in Fig. 16.

Simulation and Experimental Results
The gate pulses to the active power switch S are generated by a PWM generator using MATLAB/Simulink 19 with a switching 40 kHz frequency of as shown in Fig. 17.
The simulation results show that the oscillation in the steady state at the highest power point is minimal resulting in less energy loss and higher system efficiency, and this section discussed the evaluation and performance of the FLC controller-based transformerless high-efficiency dc to dc converter. The proposed converter results of the simulation are given in both step-up (boost) and step-down (buck) modes, and a comparison between the PI, ANN controllers and the proposed FLC-based controllers is shown in the following sections. Table 2 lists the components utilized in the proposed converter. Figures 18 and 19 illustrate the waveforms of the voltages at the input and output, as well as of the input and output power, as well as of the input and output current, inductor currents, capacitor voltages, diode voltages, current and power switch voltages, in this case, the boost mode.

The Output of the Boost Mode
When triggering the switch at 40 kHz frequency with an input 36 V voltage, the outputs voltage is obtained as 89 V, as it is shown in Fig. 18(i). The output current of 2.8 A with the output power of 248 W is shown in Fig. 18(ii), and the input current of 7.06 A with the input power of 254.4 W is shown in Fig. 18(iii).
The switch is in ON time in the CCM mode, the energy is stored in the inductors L 1 , L 2 , L 3 by the input source, and while the switch is in the OFF position, the inductors discharge it. The inductor currents produced are 6.3 A, 2.4 A, 2.4 A for inductors I L1 , I L2 , and I L3 , respectively, which are shown in Fig. 19 (i). The corresponding inductor waveforms of period time of 0-0.5 s and this inductor current from the zoomed viewpoint period time 0.3-0.3008 s are also shown in Fig. 19(i).
The voltage and current waveform of diodes D 1 and D 2 are similar and these respective diode voltages V d1 , V d2 are 78 V and diode currents I d1 , I d2 are 6.5 A are shown in Fig. 19(ii), and this diode voltage and current of zoomed viewpoint waveforms also shown in Fig. 19(ii).
The various waveforms of capacitor C 1 , C o and C 2 , C 3 are similar, and these respective capacitors voltages V c1 = V co = 90 V and V c2 = V c3 = 44 V are shown in Fig. 19(iii). And this capacitor voltage of zoomed viewpoint is also shown in Fig. 19(iii). The voltages waveforms across the switch voltages V S are 78 V, and this zoomed viewpoint is also shown in Fig. 19(iv).    Experimental results in buck mode (time: 50 us/div). (i) Output voltage (5 V/div), (ii) output current (500 mA/div) (iii) inductor L 1 current (500 mA/div) (iv) inductor L 2 current (500 mA/div) (v) inductor L 3 current (500 mA/div)

Waveforms of Buck Mode
In the buck mode, the output current and output voltage obtained are 0.54 A and 17.3 V, respectively, which is shown in Fig. 20(i). The three inductor currents I L1 , I L2 , I L3 obtained are 1.3 A, 0.6 A, 0.6 A, respectively, and the respective waveforms are shown in Fig. 20(ii), and this inductor's current zoomed view also is shown in Fig. 20(ii). The two diodes current and voltage waveform of D 1 and D 2 are similar and their respective voltages V d1 and V d2 are found to be 17 V and currents I d1 and I d2 are 1.3 A as shown in Fig. 20(iii), and these diodes zoomed viewpoint of the waveform is shown in Fig. 20(iii). In consideration with the aforementioned outcomes, it is validated that the proposed converter delivers optimum output with high accuracy, less switching stress and minimum ripples.

Comparison of the Conventional PI Controller, ANN and Proposed FLC in CCM Mode
The proposed converter-based FLC controller's performance is compared with the performance of the conventional PI controllers and artificial neural network (ANN) [33]. The output voltage waveform is illustrated in Fig. 21.
The various parameters of time specifications for the output voltage waveform of the proposed FLC, ANN controller and PI controllers are compared in Table 3. Table 3 analyzed the overshoot of maximum output voltage, the time settling point of output voltage, the output voltage of steady-state error, and peak value, the abovementioned parameter values of the suggested FLC controller have better performance when compared with the ANN and PI controller is shown in Table 3.

Experimental Results
Experimental data are included to validate the converter's performance. The step-up and step-down modes of operation are supported by the presented buck-boost converter. The converter's prototype is depicted in Fig. 22. The converter shown here has been subjected to CCM performance.
As shown in Fig. 22, a prototype of 240 W is modeled for analyzing proposed converter, and the specifications of this prototype are listed out in Table 2. For generating the gating pulses of converter switches with applicable duty ratio, the DSPIC30F2010 microcontroller is employed in this study. The fuzzy rule bases are programmed in this controller through embedded C. The converter delivers steady-state output irrespective of the load variations. Thus, it delivers high efficiency of 97.4%.
The experimental prototype is modeled for 60 V, and the outcome of the proposed converter in boost mode is displayed in Fig. 23(i), (ii). Figure 24(iii)-(v) displays the waveforms of the currents flowing through the inductors L 1 , L 2 , and L 3 , correspondingly. As the hardware prototype is designed for 60 V, the inductor current values of experimental results are slightly varied from the simulation outcomes. As per (12), (17), and (19), the averaged currents through L 1 , L 2 , and L 3 inductors are 6.3, 2.4, and 2.4 A, correspondingly. The voltage waveform of diode D 2 is identical to that of diode D 1 . Figure 23(vi) shows the voltage across diode D 1 and D 2 . The voltage across diode D 1 and D 2 is 10 V. Figure 23(vi) shows the voltage across the switch V s as 20 V.
Inductors L 1 , L 2 , and L 3 have a voltage of 60 V in mode 1 and 12 V in mode 2. The step-down mode output voltage is depicted in Fig. 24(i), (ii). 12 V is the output voltage and 0.8 A output current. Figure 24(iii)-(v) depicts the waveforms of the L 1 , L 2 , and L 3 inductors current in the buck mode of the converter. As per (12), (17), and (19), the averaged currents through L 1 , L 2 , and L 3 inductors are 1.3, 0.6, as well as 0.6 A, correspondingly. However, the hardware output waveforms of inductor current are slightly varied from the simulation outputs because the prototype is modeled for 60 V.

Efficiency Comparison of Presented Converter and other Converters in CCM Mode
The proposed converter is much efficient with an output power of 248 W shown in Fig. 18(ii), and this converter input power 254.4 W is shown in Fig. 18(iii), so both (input and output) powers are calculated and achieved by the highest efficiency of 97.4%. It is observed from the output waveforms that the presented converter has high efficiency, which is comparatively better than the other converters. The comparative analysis of the proposed converter with other converters is remarkably portrayed in Fig. 25. It is demonstrated that the presented converter has a significantly greater efficiency when compared to the Zeta converters and other converters in [19] and [28]. When operating in boost mode, Fig. 26(i) shows the step-up mode, efficiency vs output power, and Fig. 26(ii) shows the efficiency versus load currents in boost mode at a duty ratio of 0.53. Figure 26(iii) plots the efficiency gains from 0.35 to 0.7 with I O = 2.7 A versus duty ratio. Moreover, the experimental maximum efficiency is 97.1%.
In Table 5, a comparison of efficiency, voltage gain, and stress of the voltage the count of the total components used are done between the proposed converter and other converters. The presented converter has a greater voltage gain of 16 dB and greater efficiency of 97.4%, which are comparatively higher than other conventional converters. Though the number of components used in the proposed converter is slightly more when compared to other converters, it delivers maximum efficiency with less complexity, which is regarded as one of the advantageous impact of this proposed approach. In addition, the switching stress of the proposed converter is lesser then the other conventional converters.

Conclusion
This article describes a transformerless DC-DC converter for high-efficiency applications requiring large voltage Fig. 26 Evaluation of the efficiency of the proposed buck-boost converter by calculations, simulations, and experiments (i) in step-up mode, efficiency versus output power (ii) in step-up mode, efficiency versus load current, (iii) efficiency versus duty cycle step-down and step-up ratios. Some of the attributes could be summarized in the following points. With a moderate duty cycle, a high step-up and step-down voltage conversion ratio has been enforced. High efficiency owing to the use of reduced MOSFETs throughout the consolidated single-stage and the use of low-voltage high-performance power switches, making it an accurate frequency operation. The non-pulsating current and decreased current ripple are the results of the alternative research. Experimental result and MATLAB/Simulink tools have been used for verification as well as evaluation. The article examines the envisaged converter's steady-state operational activities. To illustrate the effectiveness of the suggested configuration, modeling of 36-89 V 248 W converters has been designed and developed, and it accomplished a peak efficiency. A comparative analysis is done between the proposed converter and other conventional converter in terms of efficiency, switching stress and switching loss. The proposed converter provides optimal outcome with high voltage gain of 14.02 and maximum efficiency of 97.4%. This same parametric study was verified by simulated and experimental results. In the experimental analysis, the proposed converter delivers maximum efficiency of 97.1%, which is comparatively better than other traditional converters. The proposed converter employs an FLC controller strategy, and this FLC is analogized with conventional PI and ANN controllers. The FLC has a 0% overshoot with an output voltage of 89 V. In addition, it delivers quick settling time of 0.01 s with less steady-state error of 0.01 V. However, the PI controller has a 23% overshoot, 88.5 V output voltage, 0.5 V steady-state error and 0.062 s as settling time, whereas the ANN has 3.6% overshoot, 88.9 V output voltage, 0.1 V steady-state error and 0.03 s as settling time. Thus, the proposed FLC produces better performance than other controllers in terms of efficiency, output voltage, steady-state error and settling time. Existing converter technologies have an output power of 205 W, whereas the proposed converter has an output power of 248 W. Thus, the cumulative performance of the proposed approach is magnificently higher than the other approaches. Evaluation and Improvement of a Transformerless High-Efficiency DC-DC Converter for Renewable… 309