preprints.org > engineering > electrical & electronic engineering > doi: 10.20944/preprints201909.0014.v1

Preprint Concept Paper Version 1 Preserved in Portico This version is not peer-reviewed

Version 1 : Received: 31 August 2019 / Approved: 1 September 2019 / Online: 1 September 2019 (14:40:07 CEST)

Soft-Core architecture for Analogue to Digital Converter (ADC) sampling is useful for mixed signal applications. Soft-core architecture for cutting edge odd or even ADC sampling with interface to block RAM memory has not been found. Soft-core architecture as a concept has become popular due to the advantage of customization for different applications as compared to general-core architecture suited for single application. The latest generation of piece wise sampling is odd sampling and was introduced in the second decade of the 20th century. Odd and even order sampling techniques are analogue in nature driven by a tuned (tuned for odd or even) mixer. This paper proposes a third-generation piece wise sampling with soft-core architecture that enables an option to select both odd and even while interfacing to memory mapping. The proposed odd/even has superior SNR performance of 6 dB as compared to existing architecture such as Mod-∆ which recorded worst performance of 18 dB. Advances in soft-core technology have allowed a niche odd/even switching field to be identified and studied, the study has also been extended to include memory architecture.

soft-core architecture; system on chip (SoC); radio frequency system on chip (RFSoC); adaptive compute acceleration platform (ACAP); scalar processing; vector processing; I/Q demodulator; odd order sampling; even order sampling; analogue to digital converter (ADC)

ENGINEERING, Electrical & Electronic Engineering