The Mixed Current Model of Nano-MOSFETs Considering the Effect of Horizontal and Vertical Electric Fields

A novel drive current model covering the effects of source/drain voltage (VDS) and gate voltage (VGS) and incorporating drift and diffusion current on the surface channel at the nano-node level, especially beyond 28nm node is presented. The effect of the diffusion current added is more satisfactory to describe the behavior of the drive current in nano-node MOSFETs, fabricated with the atomic-layer-deposition (ALD) technology. This breakthrough in model establishment can expose the long and short channel devices together. Introducing the variables of VDS and VGS, the mixed current model more effectively and meaningfully demonstrates the drive current of MOSFETs under the operation of horizontal, vertical, or mixed electrical field. In comparison between the simulation and experimental consequences, the electrical performance is impressive. The error between both is less than 1%, better than the empirical adjustment to issue a set of drive current models.


I. INTRODUCTION
In conventional device models for metal-oxide-semiconductor field-effect transistors (MOSFETs), the drive current [1,2] mainly considers the moving carriers with the drift effect.As the channel length of MOSFET keeps scaling down, the saturation current of MOSFETs raises up with the increase of the drain voltage or the decrease of the channel length.There are some published literatures to explain this phenomenon, such as channel length modulation [3][4][5] and velocity overshoot [6][7][8][9].However, the proposed conduction mechanisms seem not fully to fit the physically measured current-voltage results well.To compensate this drawback, the device models in semiconductor foundries usually assist some empirical adjustment, but no physical meanings.Here, we propose a new concept incorporating the diffusion effect in each channel point due to the gradient of inversion charge density, especially near the pinch-off point.At this point, the inversion charge density traditionally approaches to zero, indicating the drift current zero, but the real drive current is not zero.
As a result, the drive current rises as the drain voltage increases for a nano-scale MOSFET.Adding the diffusion effect in drive-current model, the contribution of diffusion current in entire drive current is distinctly enhanced, especially in the current behavior of short channel devices [10].In other words, a lager source/drain voltage VDS will make a lager gradient of inversion charge density causing a larger surface diffusion current.However, the previous work only changing one parameter (VDS) as VGS fixed in long or short channel devices to fit the equivalent mobility μeq accurately was successfully finished.In this work, we furthermore propose a deeper consideration incorporating the modulation of all the parameters (VDS, VGS and Lmask) at one time to fit μeq correlated to VDS, VGS and channel length on drawn mask Lmask.Furthermore, consolidating the adjustment of VDS and Lmask correlated to the horizontal electric field and VGS influencing the vertical electric field, the drive current of MOSFETs is more meaningful and beneficial in providing a set of accurate nano-  [10], the carrier mobility μ(x) should be the function of the position x in the surface channel.But it seems not enough to describe the whole behavior of an equivalent mobility μeq correlated to VDS, VGS, and Lmask, independent of the position x.Incorporating the various conditions with VDS, VGS and Lmask is to reasonably describe the whole drive current and fit the μeq as shown in Eqs.(1)-( 4): where q: unit charge, W: channel width, νd: carrier drift velocity, Dn: diffusion coefficient of electron carrier, Esat: horizontal electric field in saturation, k: Boltzmann constant, T: absolute temperature, and m: body factor.
Under the specific conditions such as fixing a channel length and tuning the gate voltages to sense the IDS-VDS characteristics, we can derive the relationship between the μeq and the drain bias, as shown in Fig. 1.Through changing the fixed channel length and the drain bias, the linear and saturation regions are obviously represented no matter what the tested channel device is.It is important to seek the accurate relationship between these three parameters and the μeq.In this work, there are four sections (a, b, c, d) illustrating longshort channel devices and linear-saturation regions split at Lmask = 120 nm due to the classification of electrical measurement, as shown in Table I.Long channel (>120 nm), Linear region X=a Long channel (>120 nm), Saturation region X=b Short channel (< 120 nm), Linear region X=c Short channel (< 120 nm), Saturation region X=d First, the μeq can be written as a function of VDS in different VGS at fixed Lmask, which can be described by the Taylor expansion until the third-order polynomial, as shown in Eq.( 5): where Xi is the coefficient of the i th polynomial and i=0,1,2,3.X can be attributed as each section (a, b, c, or d).
Continuously, the Xi is strongly related to the gate voltages as Lmask fixed, which can be given as Eq.( 6) with the Taylor expansion.
Ultimately, the impact factor Lmask to the coefficient Xij is entirely represented as Eq.( 7): where Xijk is the coefficient of Lmask variable with k=0,1,2.
The flow chart of X-coefficients and the μeq value in extraction is demonstrated in Fig. 2 with section a as an example.The other sections in parameter extraction also follow the same procedures to achieve the accurate μeq value correlated to VDS, VGS, and Lmask variables.Table II demonstrates the full relationship of parameters and X-coefficients.

III. III. RESULTS AND DISCUSSION
Following the last flow chart to obtain the coefficients (Xi, Xij, Xijk), the μeq(VDS, VGS, Lmask) at any condition can be effectively and meaningfully extracted.After that, the equivalent mobility will be immediately substituted into (4) to do the simulation of the corresponding drive current.The simulation and experimental results of I-V curves with long and short channel devices represented as four sections are shown in Fig. 3.For precise observation of the contribution of the μeq correlated to VDS, VGS, Lmask, one 3-D plot is established and shown in Fig. 4, combining all of these extracted data linked as lines and extended these lines as a continuous plane.
In this study, the tested channel-length devices contain 33, 50, 90, 120, 500 nm and 1 μm.As the channel length L is greater than 120 nm, the section is defined as the long-channel section.Thus, the plot in Fig. 4 with L= 500 nm is represented as long-channel section and with L= 33 nm as short-channel one.Furthermore, the VDS and VGS sensed are 0.1, 0.2…, 0.8 V and 0.5, 0.6, 0.7, 0.8 V, respectively.The error between simulation and real measurement data is less than 1% no matter what the channel-length devices and the operation mode at linear or saturation region are.Table III is an example to extract the coefficients in section a under VGS= 0.8 V and Lmask= nm.IV.IV.CONCLUSION Without considering the effect of channel length modulation and drift velocity overshoot, the mixed current model, including surface drift and diffusion current, has been announced to describe the electrical behavior of drive current of nano-node MOSFETs.The existence of diffusion current addresses why the drive current enters the saturation region, but not zero at the pinch-off point.The diffusion contribution in drive current becomes more apparent, especially for short-channel MOSFETs.For devices in normal operation, the parameters (VDS, VGS, and Lmask) independent of channel poistion are strongly correlated to the μeq value.Investigating the mutual interaction among them is indeed necessary.This work successfully provides the physical and meaningful consequences for nano-node MOSFET devices, fabricated with the ALD technology.The error between simulation and experimental results is less than 1%, which is more suitable to the 28nm devices or beyond to build up a more accurate set of device model in circuit design consideration.

Fig. 2 .
Fig. 2. The flow chart for extracting the coefficients and μeq values with section a as an example.

Fig. 3 .
Fig. 3. IDS vs. VDS curves for long-channel devices: (a) at Lmask= 1 μm in section a and (b) at Lmask= 500 nm in section b; for short-channel devices: (c) at Lmask= 50 nm in section c and (d) at Lmask= 33 nm in section d.
Shea-Jue Wang 3 , Ching-Chuan Chou 2 , LS Huang 4 , Wei-Lun Wang 1 node device models, especially beyond 28nm node.The gate dielectric in this work was the sandwich stack of HfOx/ZrOy/HfOz deposited with the atomic layer deposition (ALD) technology.The physical thickness with ALD technology is about 24Å II.II.EXPERIMENTAL AND FITTING THE MOBILITY Based on the previous work

Table III .
The values of coefficients in section a under VGS= 0.8 V and Lmask = 500 nm.