Topological Horseshoe Analysis and FPGA Implementation of the Fractional-Order Liu System

This paper first discusses a fractional-order Liu system of order as low as 2.7 and shows its chaotic characteristics by carrying out numerical simulations such as Lyapunov exponents, bifurcation diagrams and phase portraits. Then, by using the topological horseshoe theory and computer-assisted proof, the existence of chaos in the system is verified theoretically. Finally, the fractional-order system is implemented on a Field Programmable Gate Array (FPGA) and the results obtained show that the fractional-order Liu system is indeed chaotic.


Introduction
In recent years, fractional calculus has been a hot topic in various academic disciplines.It has been found that fractional calculus provides a realistic description of some physical natural phenomena [1,2].Fractional calculus has been also successfully applied in the fields of signal processing, economics, mechanical engineering and secure communications [3][4][5][6][7].Fractional-order systems (FOS) can describe the inherent characteristics and physical properties more accurately [8].Research on integer-order chaotic systems has also been extended to fractional-order chaotic systems, such as the fractional Chen system [9], fractional Lorenz system [10,11], fractional Chua circuit [12], fractional cellular neural networks [13], etc.
Up to the present day, most of the literature on the analysis of fractional-order chaotic systems is still limited to numerical simulations, such as Lyapunov exponents, phase portraits, etcetera.The rigorous verification of the existence of chaos is still a challenge.The topological horseshoe theory is an analytical method which can verify the existence of chaos from a mathematical point of view [14,15].Furthermore, the topological horseshoe lemma was proposed as a practical and useful computer-assisted proof method [16].This theory has already been used to prove the existence of chaos in some integer-order systems, for example Dong et al. proved its existence in typical 3D systems [17][18][19][20], Wang et al. proved the chaos existence in hyperchaos system [21][22][23][24], Jia et al. analyzed the existence of chaos in fractional order L ü chaotic systems [25][26][27][28].
In the past twenty years, related work mainly uses traditional analog circuits to generate chaotic signals [29][30][31].However, in doing so, there are many drawbacks, for instance, the signal is affected by the external environment and the circuit cannot set the system's initial values.Therefore, this scheme cannot be used in engineering applications.Fortunately, modern digital signal processing technology, especially Field Programmed Gates Array (FPGA), provides a more stable and a more flexible way to generate chaotic signals [32][33][34][35], which are not easily affected by external factors.At present, studies on FPGA implementation of fractional chaos is rarely shared [36], and the work available is mostly limited to MATLAB and Simulink simulations.It is well known that the chaotic characteristics of a FOS may disappear even if its corresponding integer order indicates it is a chaotic system.Therefore, before the FOS is used for communication encryption, such as image encryption and voice encryption, the system must be proved to be chaotic.In fact, from a mathematical point of view, only a few FOS have been strictly proved to be chaotic, which will undoubtedly limit their application in engineering fields.[37].
The contribution of this paper is that based on the method of topological horseshoe analysis adopted in many integer-order chaotic systems, it is proved that a topological horseshoe does exist in a fractional-order system of order as low as 2.7, which verifies its chaotic characteristic.Not only that, we also use a FPGA development platform to generate fractional-order chaotic signals.This work shows that fractional-order chaotic system can be used in engineering fields.
The rest of this paper is organized as follows: In section 2, dynamic behavior of a fractional-order Liu system is analyzed by numerical simulations, such as Lyapunov exponent spectrum, bifurcation diagrams and phase trajectory.In Section 3, the existence of chaos is rigorously confirmed by using a computer-assisted proof method.A conclusion is given in section 4.

The Fractional-order Liu attractor
The fractional-order Liu chaotic system [26] can be described as equation (1).
Where a, b, c, d, h are constant parameters, and q is the fractional order.The definition of fractional derivatives adopted in this paper is the famous Riemann-Liouvile definition [38], which can be defined as equation (2).
Generally speaking, it is difficult to compute the solution of a fractional ordinary differential equation, therefore system (1) needs to be transformed into the Laplace domain.The frequency-domain approximation method will be used to analyze the fractional-order system, which has also been adopted in some other papers [39,40].Considering the initial value of system (1) is zero, the Laplace transform of the Riemann-Liouvile definition is The Laplace transformation of system (1) is described as equation (4). Where According to [41], based on the Potter frequency domain approximation method, the approximation of the transfer functionin 1 \ s q the frequency domain is as follows: Where g=2.2675, k=216.692,l=278.2968,m=361.567,n=778.819,p=10.Considering a ninth-order integer differential equation ( 6) was obtained by substituting equation ( 5) into equation (4).
Where A=agl+p, B=agk+n, C=ag+m, D=ag, M=agl, N=agk, P=bgl, Q=bgk, E=bg, F=cg, W=cgk, R=cgl, G=2hg, T=2hgk, J=hgl, H=dg+m, I=dgk+n, L=dgl+p.Initial value  As numerical analysis method, the Lyapunov exponents and bifurcation diagram are difficult to avoid the numerical error, which are insufficient to rigorously verify the chaotic properties of the fractional system.Therefore, a topological horseshoe method was adopted to verify the chaotic dynamics from a mathematical viewpoint in section 3.

Topological horseshoe analysis and verification
Until now, topological horseshoe theory has been evolved into multiple theorems, such as Smale horseshoe theorem, Kennedy horseshoe theorem and Zgliczynski horseshoe theorem [42][43][44][45].As a practical computer assisted proof method, the topological horseshoe lemma was proposed by Yang and Li et al, The following is a brief review of the knowledge related to the topology horseshoe analysis.
A set having the three properties in the above proposition is often defined as a Cantor set, such a Cantor set frequently appears in characterization of complex structure of invariant set in a chaotic dynamical system [8,20,25].
According to reference [25] m-shift map can be defined as σ(s i ) = s i+1 , which is referred to as the m−shift map, and thus there is the following facts.
Theorem 2[23,25-29] (a) σ(X) = X, and σ is continuous; (b) The shift map σ as a dynamical system defined on X has: (i) a countable infinity of periodic orbits consisting of orbits of all periods; (ii) an uncountable infinity of non-periodic orbits; (iii) a dense orbit.Thus the dynamics generated by the shift map σ display sensitive dependence on initial conditions on a closed invariant set, and therefore are chaotic.(See [29] for proofs of the above theorems.) Let X be a separable metric space, Q be a compact subset of X, and let f : Q → X be a map with the property that there exist m mutually disjoint compact subsets m) is nonempty and compact, then Γ is called a connection with respect to Q 1 , Q 2 , ..., Q m F is said to be an f -connected family if F is a family of connections with respect to Q 1 , Q 2 , ..., Q m satisfying the following property: [14,15] If there exists an f -connected family with respect to Q 1 , Q 2 , ..., Q m .Then there exists a compact invariant set k ⊂ Q, such that f |K is semi-conjugate to m-shift.
Theorem 4 [19] For two dynamical systems (X, f)and(Y, g).If (X, f) is semi-conjugate to (Y, g), then the topological entropy of f is not less than that of g.
The topological entropy is a nonnegative real number.Generally speaking, the system is chaotic if its topological entropy is not zero.Furthermore, if g is an m-shift map, then ent(f) ≥ ent(g) = log m, that is, f is chaotic when m>1.Actually, those theorems cannot be applied in a continuous system directly.To facilitate the use of theorems, it is necessary to establish Poincaré sections and Poincaré map for continuous systems.Thus, an appropriate Poincaré section should be selected in following subsection.

Horseshoe in the fractional-order Liu system
The poincaré cross-section ( 7) is considered In this paper, the corresponding cross-section X = |MNPQ| firstly was choosed on the plane (7), which is show in According to the analysis above, for each connection Γ lying in set |ABCD| and connecting AB and CD with respect to subset |JKGH| and subset |EFCD|, the following condition is satisfied: , where Γ 1 = Γ ∩ |JKGH| and Γ 2 = Γ ∩ |EFCD| and thus F is called a connected family with respect to |JKGH| and |EFCD|.According to the Definition 1, so there exists a connection family with respect to |JKGH| and |EFCD| for the map ω.According to theorem 1 and 3, the map ω is semi-conjugate to the 2-shift map and according to theorem 2 and 4 further come to the conclusion that entropy of system (1) satisfy ent(ω) ≥ log2 > 0. Thus, all these facts prove that the fractional-order Liu system has positive entropy and it chaos characteristics are strictly proved.

FPGA implementation
In this section, for the convenience of engineering applications in fields of secure communication, such as information encryption, a digital chaotic circuit was designed and implemented using an FPGA chip.First, the continuous system (1) was discretized using the Euler method.The discretized chaotic system can be shown as equation (8).The experiment result showed that the chaotic attractors generated by FPGA were exactly consistent with the numerical simulations in each phase plane(see Fig. 13), which verified the effectiveness of the FPGA implementation method.Due to the advantages of high flexibility, easy programming, the FPGA implementation method of chaotic circuit can also be applied to other fractional order chaotic systems.

Conclusions
In this paper, the dynamic behavior of a fractional-order Liu system is studied.Numerical simulations, such as Lyapunov exponent spectrum, bifurcation diagrams and phase trajectory, are analyzed in detail.Then, its chaotic properties are verified using a combination of topological horseshoe theory and numerical calculations.In this method, a suitable Poincar é section is first selected, and a first-return map to this section is constructed.Subsequently a one-dimensional tensile topological horseshoe is discovered, which indicates that the fractional-order attractor has positive topological entropy.Therefore, the verification of the existence of chaos is over.Finally, by using a FPGA, a digital circuit is designed to realize the fractional-order Liu system, and its chaotic properties are empirically verified, which can provide further technical support for the application of the fractional chaotic system in engineering applications.

Figure 1 .Figure 2 .
Figure 1.The Lyapunov exponents diagram of the fractional order Liu system(versus a)

Figure 4 .
Figure 4.The 2.7 order fractional Liu chaotic attractors.(a) projection on x-y plane; (b) projection on x-z plane;(c) projection on y-z plane

Figure 7 .Figure 8 .Figure 9 .
Figure 7.The image |A B C D | of the quadrangle |ABCD|.Partially enlarged view under the lower right corner and in the upper left corner

( 8 )
Second, by making use of DSP-Builder to build the system model which consist of Signal-Compliler block, Parallel Adder Subtractor block, AltBus block, Input block, Output block, ClockAltr Block, Gain block and Single Pulse block, see Fig 11.Using the powerful graphical simulation capabilities of Simulink to verify the correctness of the model (8).The most important step is to convert the model files (.mdl suffix) into the VHDL(Verilog Hardware Description Language) (.vhd suffix) through the signal-compiler block.Synthesize and compile the RTL (Register Transfer Level) code and download the generated .soffile to FPGA chip.Finally, to facilitate observe the chaotic signal on an analog oscilloscope, an AD9764 digital-analog conversion chip of 14-bits was used to convert the digital signals into analog signals in the experiment.The clock frequency of the AD9764 and the FPGA chip was synchronized on 50 MHz.Figure 10 shows all experimental facility required for chaotic signal generation.In order to match the width of AD9764, the original 25-bits output of chaotic signals is limited to 14-bits.Fig 12 is a structural model of one of the subsystems.