Study on Solar Power Charging by Flyback Converter

Guo-Shing Huang 1, Shing-Lih Wu 2,*, Pei-Siou Ding 1 1 Department of Electronic Engineering, National Chin-Yi University of Technology, No.57, Sec.2, Zhongshan Rd., Taiping Dist., Taichung 41170, Taiwan; hgs@ncut.edu.tw (G.-S.H.); dennis22662003@yahoo.com.tw (P.-S.D.) 2 Department of Electrical Engineering, National Taitung Junior College, No.911, Jhengci N. Rd., Taitung 95045, Taiwan * Correspondence: lihchoug@yahoo.com.tw; Tel.: +886-89-226-389; Fax: +886-89-232-871


Introduction
The resource that Mother Earth can provide is depleting. Oil, the primary source of energy source, is coming to its end of supply. New alternative energy sources have to be found. Among these new energies, solar power features zero pollution. Today, many branches of industries are linked to solar power generation, and batteries are used for energy storage. Among all, lead acid battery is the most commonly used type of battery [1]- [6], as it features stable working voltage and a wide range of working temperature and current. It is capable of charging and recharging for hundreds of cycles, good energy storage performance and low cost [7]- [13]. However, batteries have to be connected in series and parallel for higher voltage and current output to meet the various demands for power. As a result, the safety of the battery during charging becomes increasingly important [13]- [19]. There are a number of studies on battery charging, most of which are focused on pulse charging. The pulse charging works by controlling the length of triggering time with a pulse width modulating controller. When the battery is low, the number of pulses increases, and so does the number of turn-ons at transistor (Q). On the other hand, as the battery is about to be fully charged, both the numbers of pulses and turn-ons at transistor (Q) decrease, so that when the battery is fully charged, the pulse width modulating controller cuts the transistor (Q) off, which completes the charging [20]- [26]. However, this easily leads to overcharging and overheating. In this study, the control circuit, combined with overcharging and over-discharging protection circuits, is capable of balancing the voltage across multiple batteries automatically, while charging multiple batteries and preventing overheating, thus achieving the protection of battery and extended service life of these batteries. The buffer circuit, auxiliary power circuit, control circuit, voltage feedback circuit and current feedback circuit is added for better system stability. In addition, the system is able to monitor the battery voltage and the current that charged the coupling inductor, and featured automatic control of output duty cycle and over-charging/discharging protection. The experiment conducts to prove that the system's charging efficiency is improved by about 83% at full load.

System chart of solar power flyback charger
The solar power flyback charging system mentioned in this study consisted of a solar panel, control system and lead-acid battery. The system architecture includes coupling inductor, auxiliary power supply, control power supply, over-voltage detection circuit and over-current detection circuit, as shown in Figure 1.

Figure 1 System chart
The flow chart is shown in Figure 2. To start, the solar panel generates 18V power which is regulated into controlled by low-ripple voltage via regulating circuit and supplied to pulse width modulating control circuit and DC converter circuit. The control circuit output pulse width is converting into signals for the control of current stored in the inductor. Then, the unstable ripple voltage of secondary output had to control the more stable 12V through the output filtering circuit to charge the lead acid battery. The overvoltage and overcurrent protection circuits are used to detect the voltage of battery, and the feedback circuit is used to control the duty cycle of pulse width modulating signals, as shown in Figure 2.  Figure 3 shows the buffer circuit. When the transistor is off, the capacitor C is charged through diode D1 with the voltage on the inductor as its value. When the transistor is turned on, the capacitor discharges along the path of resistor R, the power consumed by the buffer circuit is determined as Eq.

Buffer circuit design
where E is energy, C is the capacitance in the buffer circuit, DS V is the voltage between the drain and source of MOSFET, C V is the voltage of capacitor, on t is the duration the MOSFET turn on, and Eq. (5) is the discharge current of the buffer circuit.

Pulse width regulating control circuit
The pulse width modulating signal controls the internal circuit of UC3842 and modulates the duty cycle of MOSFET through an external circuit. In this study, the partial voltage of external resistors PIN1 and PIN2 are compared to the internal 2.5V by an error amplifier. When the output voltage is greater than 2.5V, the voltage is too large and therefore, the output duty cycle is reduced. When the output voltage is smaller than 2.5V, the voltage is too low and therefore, the output duty cycle is increased, as shown in Figure 4. In case that the ideal value and error value are too large, the external compensation circuit PIN1 is conducted to fine-tune the error value and allow the circuit to stay close to the determined ideal value, as shown in Figure 5. The output frequency is determined by the T R of PIN8 and T C of PIN4, as shown in Figure 6. However, T R has to be greater than 5kΩ. The frequency is determined with Eq. (6). where f Z is the negative feedback output impedance in Ω, i Z is the input impedance in Ω, o V is the output voltage in V, and i V input voltage in V. Figure 6 Design frequency circuit diagram where f is the frequency that determines the generated pulse width modulating signals in Hz, T C is the capacitance that generates oscillation frequency in F, and T R is the resistance that generates oscillation frequency in Ω.

System stability design
As mentioned above, the external compensation circuit PIN1 provides output regulation. There are a variety of feedback compensation techniques available, and the lag compensation circuit is chosen for this study. It proves the improvement of steady state errors, as the lag compensation circuit itself is a type of low-pass filter; such as it only allows low-frequency signals to pass and causes highfrequency signals to attenuate. In this study, a pair of zero-pole operational amplifier circuit is designed. The feedback is used to fix the system within a frequency range without any phase shift. As shown in Table I, the crossover frequency is set at c f =10kHz, since the pulse width modulating signal frequency is f =100kHz. The crossover frequency is designed as 10% of the pulse width modulating signal frequency for a more stable system. Then, the zero frequency is defined as where 3 R is the negative feedback resistance in Ω, 1 R is the input resistance in Ω, AV is the voltage gain, and 1 C , 2 C are the capacitances that determine the frequency response in F.

Winding of coupling inductor
The winding of coupling inductor is aimed to turn ratio and the size of used enameled wire. For a flyback converter, the wire is wound in the reverse direction. As the inductor reached volt-sec balance, the turn ratio n is determined by substituting min is the maximum initial voltage imposed in V, p I is the primary side current in A, s I is the secondary side current in A, and n is the turn ratio between primary and secondary windings in turns.

Experiment
The waveform of inductor and current are measured and efficiency of those are compared. Modification is made based on experiment results and the optimized value is obtained. The measurement flowchart is provided in Figure 9.

Waveform measurement
The DS V of MOSFET is measured for waveforms. A comparison is made between the presence and absence of buffer. The input voltage and load were varied for measurement.

Efficiency comparison
The voltage measurements yielded the input and output powers, which were used to calculate the conversion efficiency. The experiment result suggests the impact of increase and decrease of input voltage on the conversion efficiency.

Experiment results
It is clear in Figure 10 that the conversion efficiency of the solar panel was at its highest between 10:00 am and 3:30 pm. Shading caused decrease of conversion efficiency in this period of time. The feedback circuit is designed to change the magnitude and increase the stability of power supply. With a load of 100Ω, the input voltage is 18V and output voltage is 13.3V, as shown in Figure 13. The idea to add a buffer circuit in the system is to avoid damage of elements due to instability of input voltage or even unwanted oscillations. These oscillations led to very high voltage at the DS V end. The 18V input can increase the oscillation voltage up to 80V as shown in Figure 11. However, the addition of buffer circuit reduced the oscillation voltage significantly, as the voltage amplitude dropped from 80V to 20V. This demonstrates effective reduction of power loss on MOSFET and in turn the protection of MOSFET, as shown in Figure 12. The stability of power supply is improved by regulating the magnitude of duty with the feedback circuit designed. With a load of 100Ω, the input voltage is 18.2V, the output voltage is 13.3V and the duty is 21%, as shown in Figure 13. With a load of 10Ω, the input voltage is 17.8V, the output voltage is 12.9V, and the duty is 43%, as shown in Figure 14.  Table II, the output power reaches as high as 16.6W at the same voltage by only changing the loading. Due to the addition of feedback circuit, the larger the load, the greater the duty cycle; whereas the smaller the load, the smaller the duty cycle. When the input voltage is 14.1V, the output voltage is 12V, the load is 10Ω and the duty cycle is 43%, as shown in Figure 15. When the input voltage is 18.1V, the output voltage is 13V, the load is 10Ω and the duty cycle is 43%, as shown in Figure 16. It is found that the output voltage dropped by 1V and the duty cycle remained the same when the output voltage decreased from 18.1 to 14.1V. PWM decreased with the input voltage.  Table III that the efficiency decreased with the input voltage as the battery is being charged. The reason is the power loss due to the internal resistance of MOSFET DS r and leakage inductance. The leakage inductance loss increased as the input voltage is close to the output voltage. It becomes difficult to drive the MOSFET when the PWM voltage is decreased, and the internal resistance DS r is increased, which causes power loss. The solar power battery chargers available in the market sometimes experience unstable current. As indicated in Figure 17, it is clear that a current up to 4A is generated when the PWM switch is turned on and off. When a lead acid battery is charged under such a maximum instantaneous current, the battery's service life is reduced as the charging time increases. The output voltage provided by the design presented in this study is much more stable than that by market-available products for lead acid battery charging. The maximum instantaneous current generated is smaller when the PWM is switched on and off as indicated in Figure 18.

Conclusion
This study is motivated by the instability of solar power generation. A flyback charged is used to convert sunlight into electric energy to store in lead acid battery. Over-charge/discharging protection is added to detect the battery charging. The experiment results suggest 6.6% of error between the ideal value and practical value. The design presented in this study is capable of fast charging with the standard test condition of the sunshine intensity of 1000W/m 2 . The design is capable of monitoring the battery charging, thus contributing to the longevity of battery. In addition, the unstable current output commonly seen in market-available products is improved.